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[smlnj] Annotation of /MLRISC/trunk/amd64/emit/amd64Asm.sml
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Annotation of /MLRISC/trunk/amd64/emit/amd64Asm.sml

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1 : mrainey 2619 (*
2 :     * WARNING: This file was automatically generated by MDLGen (v3.0)
3 :     * from the machine description file "amd64/amd64.mdl".
4 :     * DO NOT EDIT this file directly
5 :     *)
6 :    
7 :    
8 :     functor AMD64AsmEmitter(structure S : INSTRUCTION_STREAM
9 :     structure Instr : AMD64INSTR
10 :     where T = S.P.T
11 :     structure Shuffle : AMD64SHUFFLE
12 :     where I = Instr
13 :     structure MLTreeEval : MLTREE_EVAL
14 :     where T = Instr.T
15 :     ) : INSTRUCTION_EMITTER =
16 :     struct
17 :     structure I = Instr
18 :     structure C = I.C
19 :     structure T = I.T
20 :     structure S = S
21 :     structure P = S.P
22 :     structure Constant = I.Constant
23 :    
24 :     open AsmFlags
25 :    
26 :     fun error msg = MLRiscErrorMsg.error("AMD64AsmEmitter",msg)
27 :    
28 :     fun makeStream formatAnnotations =
29 :     let val stream = !AsmStream.asmOutStream
30 :     fun emit' s = TextIO.output(stream,s)
31 :     val newline = ref true
32 :     val tabs = ref 0
33 :     fun tabbing 0 = ()
34 :     | tabbing n = (emit' "\t"; tabbing(n-1))
35 :     fun emit s = (tabbing(!tabs); tabs := 0; newline := false; emit' s)
36 :     fun nl() = (tabs := 0; if !newline then () else (newline := true; emit' "\n"))
37 :     fun comma() = emit ","
38 :     fun tab() = tabs := 1
39 :     fun indent() = tabs := 2
40 :     fun ms n = let val s = Int.toString n
41 :     in if n<0 then "-"^String.substring(s,1,size s-1)
42 :     else s
43 :     end
44 :     fun emit_label lab = emit(P.Client.AsmPseudoOps.lexpToString(T.LABEL lab))
45 :     fun emit_labexp le = emit(P.Client.AsmPseudoOps.lexpToString (T.LABEXP le))
46 :     fun emit_const c = emit(Constant.toString c)
47 :     fun emit_int i = emit(ms i)
48 :     fun paren f = (emit "("; f(); emit ")")
49 :     fun defineLabel lab = emit(P.Client.AsmPseudoOps.defineLabel lab^"\n")
50 :     fun entryLabel lab = defineLabel lab
51 :     fun comment msg = (tab(); emit("/* " ^ msg ^ " */"); nl())
52 :     fun annotation a = comment(Annotations.toString a)
53 :     fun getAnnotations() = error "getAnnotations"
54 :     fun doNothing _ = ()
55 :     fun fail _ = raise Fail "AsmEmitter"
56 :     fun emit_region mem = comment(I.Region.toString mem)
57 :     val emit_region =
58 :     if !show_region then emit_region else doNothing
59 :     fun pseudoOp pOp = (emit(P.toString pOp); emit "\n")
60 :     fun init size = (comment("Code Size = " ^ ms size); nl())
61 :     val emitCellInfo = AsmFormatUtil.reginfo
62 :     (emit,formatAnnotations)
63 :     fun emitCell r = (emit(CellsBasis.toString r); emitCellInfo r)
64 :     fun emit_cellset(title,cellset) =
65 :     (nl(); comment(title^CellsBasis.CellSet.toString cellset))
66 :     val emit_cellset =
67 :     if !show_cellset then emit_cellset else doNothing
68 :     fun emit_defs cellset = emit_cellset("defs: ",cellset)
69 :     fun emit_uses cellset = emit_cellset("uses: ",cellset)
70 :     val emit_cutsTo =
71 :     if !show_cutsTo then AsmFormatUtil.emit_cutsTo emit
72 :     else doNothing
73 :     fun emitter instr =
74 :     let
75 :     fun asm_cond (I.EQ) = "e"
76 :     | asm_cond (I.NE) = "ne"
77 :     | asm_cond (I.LT) = "l"
78 :     | asm_cond (I.LE) = "le"
79 :     | asm_cond (I.GT) = "g"
80 :     | asm_cond (I.GE) = "ge"
81 :     | asm_cond (I.B) = "b"
82 :     | asm_cond (I.BE) = "be"
83 :     | asm_cond (I.A) = "a"
84 :     | asm_cond (I.AE) = "ae"
85 :     | asm_cond (I.C) = "c"
86 :     | asm_cond (I.NC) = "nc"
87 :     | asm_cond (I.P) = "p"
88 :     | asm_cond (I.NP) = "np"
89 :     | asm_cond (I.O) = "o"
90 :     | asm_cond (I.NO) = "no"
91 :     and emit_cond x = emit (asm_cond x)
92 :     and asm_binaryOp (I.ADDQ) = "addq"
93 :     | asm_binaryOp (I.SUBQ) = "subq"
94 :     | asm_binaryOp (I.ANDQ) = "andq"
95 :     | asm_binaryOp (I.ORQ) = "orq"
96 :     | asm_binaryOp (I.XORQ) = "xorq"
97 :     | asm_binaryOp (I.SHLQ) = "shlq"
98 :     | asm_binaryOp (I.SARQ) = "sarq"
99 :     | asm_binaryOp (I.SHRQ) = "shrq"
100 :     | asm_binaryOp (I.MULQ) = "mulq"
101 :     | asm_binaryOp (I.IMULQ) = "imulq"
102 :     | asm_binaryOp (I.ADCQ) = "adcq"
103 :     | asm_binaryOp (I.SBBQ) = "sbbq"
104 :     | asm_binaryOp (I.ADDL) = "addl"
105 :     | asm_binaryOp (I.SUBL) = "subl"
106 :     | asm_binaryOp (I.ANDL) = "andl"
107 :     | asm_binaryOp (I.ORL) = "orl"
108 :     | asm_binaryOp (I.XORL) = "xorl"
109 :     | asm_binaryOp (I.SHLL) = "shll"
110 :     | asm_binaryOp (I.SARL) = "sarl"
111 :     | asm_binaryOp (I.SHRL) = "shrl"
112 :     | asm_binaryOp (I.MULL) = "mull"
113 :     | asm_binaryOp (I.IMULL) = "imull"
114 :     | asm_binaryOp (I.ADCL) = "adcl"
115 :     | asm_binaryOp (I.SBBL) = "sbbl"
116 :     | asm_binaryOp (I.ADDW) = "addw"
117 :     | asm_binaryOp (I.SUBW) = "subw"
118 :     | asm_binaryOp (I.ANDW) = "andw"
119 :     | asm_binaryOp (I.ORW) = "orw"
120 :     | asm_binaryOp (I.XORW) = "xorw"
121 :     | asm_binaryOp (I.SHLW) = "shlw"
122 :     | asm_binaryOp (I.SARW) = "sarw"
123 :     | asm_binaryOp (I.SHRW) = "shrw"
124 :     | asm_binaryOp (I.MULW) = "mulw"
125 :     | asm_binaryOp (I.IMULW) = "imulw"
126 :     | asm_binaryOp (I.ADDB) = "addb"
127 :     | asm_binaryOp (I.SUBB) = "subb"
128 :     | asm_binaryOp (I.ANDB) = "andb"
129 :     | asm_binaryOp (I.ORB) = "orb"
130 :     | asm_binaryOp (I.XORB) = "xorb"
131 :     | asm_binaryOp (I.SHLB) = "shlb"
132 :     | asm_binaryOp (I.SARB) = "sarb"
133 :     | asm_binaryOp (I.SHRB) = "shrb"
134 :     | asm_binaryOp (I.MULB) = "mulb"
135 :     | asm_binaryOp (I.IMULB) = "imulb"
136 :     | asm_binaryOp (I.BTSW) = "btsw"
137 :     | asm_binaryOp (I.BTCW) = "btcw"
138 :     | asm_binaryOp (I.BTRW) = "btrw"
139 :     | asm_binaryOp (I.BTSL) = "btsl"
140 :     | asm_binaryOp (I.BTCL) = "btcl"
141 :     | asm_binaryOp (I.BTRL) = "btrl"
142 :     | asm_binaryOp (I.ROLW) = "rolw"
143 :     | asm_binaryOp (I.RORW) = "rorw"
144 :     | asm_binaryOp (I.ROLL) = "roll"
145 :     | asm_binaryOp (I.RORL) = "rorl"
146 :     | asm_binaryOp (I.XCHGB) = "xchgb"
147 :     | asm_binaryOp (I.XCHGW) = "xchgw"
148 :     | asm_binaryOp (I.XCHGL) = "xchgl"
149 :     | asm_binaryOp (I.LOCK_ADCW) = "lock\n\tadcw"
150 :     | asm_binaryOp (I.LOCK_ADCL) = "lock\n\tadcl"
151 :     | asm_binaryOp (I.LOCK_ADDW) = "lock\n\taddw"
152 :     | asm_binaryOp (I.LOCK_ADDL) = "lock\n\taddl"
153 :     | asm_binaryOp (I.LOCK_ANDW) = "lock\n\tandw"
154 :     | asm_binaryOp (I.LOCK_ANDL) = "lock\n\tandl"
155 :     | asm_binaryOp (I.LOCK_BTSW) = "lock\n\tbtsw"
156 :     | asm_binaryOp (I.LOCK_BTSL) = "lock\n\tbtsl"
157 :     | asm_binaryOp (I.LOCK_BTRW) = "lock\n\tbtrw"
158 :     | asm_binaryOp (I.LOCK_BTRL) = "lock\n\tbtrl"
159 :     | asm_binaryOp (I.LOCK_BTCW) = "lock\n\tbtcw"
160 :     | asm_binaryOp (I.LOCK_BTCL) = "lock\n\tbtcl"
161 :     | asm_binaryOp (I.LOCK_ORW) = "lock\n\torw"
162 :     | asm_binaryOp (I.LOCK_ORL) = "lock\n\torl"
163 :     | asm_binaryOp (I.LOCK_SBBW) = "lock\n\tsbbw"
164 :     | asm_binaryOp (I.LOCK_SBBL) = "lock\n\tsbbl"
165 :     | asm_binaryOp (I.LOCK_SUBW) = "lock\n\tsubw"
166 :     | asm_binaryOp (I.LOCK_SUBL) = "lock\n\tsubl"
167 :     | asm_binaryOp (I.LOCK_XORW) = "lock\n\txorw"
168 :     | asm_binaryOp (I.LOCK_XORL) = "lock\n\txorl"
169 :     | asm_binaryOp (I.LOCK_XADDB) = "lock\n\txaddb"
170 :     | asm_binaryOp (I.LOCK_XADDW) = "lock\n\txaddw"
171 :     | asm_binaryOp (I.LOCK_XADDL) = "lock\n\txaddl"
172 :     and emit_binaryOp x = emit (asm_binaryOp x)
173 :     and asm_multDivOp (I.IMULL1) = "imull"
174 :     | asm_multDivOp (I.MULL1) = "mull"
175 :     | asm_multDivOp (I.IDIVL1) = "idivl"
176 :     | asm_multDivOp (I.DIVL1) = "divl"
177 :     | asm_multDivOp (I.IMULQ1) = "imulq"
178 :     | asm_multDivOp (I.MULQ1) = "mulq"
179 :     | asm_multDivOp (I.IDIVQ1) = "idivq"
180 :     | asm_multDivOp (I.DIVQ1) = "divq"
181 :     and emit_multDivOp x = emit (asm_multDivOp x)
182 :     and asm_unaryOp (I.DECQ) = "decq"
183 :     | asm_unaryOp (I.INCQ) = "incq"
184 :     | asm_unaryOp (I.NEGQ) = "negq"
185 :     | asm_unaryOp (I.NOTQ) = "notq"
186 :     | asm_unaryOp (I.DECL) = "decl"
187 :     | asm_unaryOp (I.INCL) = "incl"
188 :     | asm_unaryOp (I.NEGL) = "negl"
189 :     | asm_unaryOp (I.NOTL) = "notl"
190 :     | asm_unaryOp (I.DECW) = "decw"
191 :     | asm_unaryOp (I.INCW) = "incw"
192 :     | asm_unaryOp (I.NEGW) = "negw"
193 :     | asm_unaryOp (I.NOTW) = "notw"
194 :     | asm_unaryOp (I.DECB) = "decb"
195 :     | asm_unaryOp (I.INCB) = "incb"
196 :     | asm_unaryOp (I.NEGB) = "negb"
197 :     | asm_unaryOp (I.NOTB) = "notb"
198 :     | asm_unaryOp (I.LOCK_DECQ) = "lock\n\tdecq"
199 :     | asm_unaryOp (I.LOCK_INCQ) = "lock\n\tincq"
200 :     | asm_unaryOp (I.LOCK_NEGQ) = "lock\n\tnegq"
201 :     | asm_unaryOp (I.LOCK_NOTQ) = "lock\n\tnotq"
202 :     and emit_unaryOp x = emit (asm_unaryOp x)
203 :     and asm_shiftOp (I.SHLDL) = "shldl"
204 :     | asm_shiftOp (I.SHRDL) = "shrdl"
205 :     and emit_shiftOp x = emit (asm_shiftOp x)
206 :     and asm_bitOp (I.BTW) = "btw"
207 :     | asm_bitOp (I.BTL) = "btl"
208 :     | asm_bitOp (I.BTQ) = "btq"
209 :     | asm_bitOp (I.LOCK_BTW) = "lock\n\tbtw"
210 :     | asm_bitOp (I.LOCK_BTL) = "lock\n\tbtl"
211 :     and emit_bitOp x = emit (asm_bitOp x)
212 :     and asm_move (I.MOVQ) = "movq"
213 :     | asm_move (I.MOVL) = "movl"
214 :     | asm_move (I.MOVB) = "movb"
215 :     | asm_move (I.MOVW) = "movw"
216 : mrainey 2776 | asm_move (I.MOVABSQ) = "movabsq"
217 : mrainey 2619 | asm_move (I.MOVSWQ) = "movswq"
218 :     | asm_move (I.MOVZWQ) = "movzwq"
219 :     | asm_move (I.MOVSWL) = "movswl"
220 :     | asm_move (I.MOVZWL) = "movzwl"
221 :     | asm_move (I.MOVSBQ) = "movsbq"
222 :     | asm_move (I.MOVZBQ) = "movzbq"
223 :     | asm_move (I.MOVSBL) = "movsbl"
224 :     | asm_move (I.MOVZBL) = "movzbl"
225 :     | asm_move (I.MOVSLQ) = "movslq"
226 :     and emit_move x = emit (asm_move x)
227 :     and asm_fbin_op (I.ADDSS) = "addss"
228 :     | asm_fbin_op (I.ADDSD) = "addsd"
229 :     | asm_fbin_op (I.SUBSS) = "subss"
230 :     | asm_fbin_op (I.SUBSD) = "subsd"
231 :     | asm_fbin_op (I.MULSS) = "mulss"
232 :     | asm_fbin_op (I.MULSD) = "mulsd"
233 :     | asm_fbin_op (I.DIVSS) = "divss"
234 :     | asm_fbin_op (I.DIVSD) = "divsd"
235 :     and emit_fbin_op x = emit (asm_fbin_op x)
236 :     and asm_fcom_op (I.COMISS) = "comiss"
237 :     | asm_fcom_op (I.COMISD) = "comisd"
238 :     | asm_fcom_op (I.UCOMISS) = "ucomiss"
239 :     | asm_fcom_op (I.UCOMISD) = "ucomisd"
240 :     and emit_fcom_op x = emit (asm_fcom_op x)
241 :     and asm_fmove_op (I.MOVSS) = "movss"
242 :     | asm_fmove_op (I.MOVSD) = "movsd"
243 :     | asm_fmove_op (I.CVTSS2SD) = "cvtss2sd"
244 :     | asm_fmove_op (I.CVTSD2SS) = "cvtsd2ss"
245 :     | asm_fmove_op (I.CVTSS2SI) = "cvtss2si"
246 :     | asm_fmove_op (I.CVTSS2SIQ) = "cvtss2siq"
247 :     | asm_fmove_op (I.CVTSD2SI) = "cvtsd2si"
248 :     | asm_fmove_op (I.CVTSD2SIQ) = "cvtsd2siq"
249 :     | asm_fmove_op (I.CVTSI2SS) = "cvtsi2ss"
250 :     | asm_fmove_op (I.CVTSI2SSQ) = "cvtsi2ssq"
251 :     | asm_fmove_op (I.CVTSI2SD) = "cvtsi2sd"
252 :     | asm_fmove_op (I.CVTSI2SDQ) = "cvtsi2sdq"
253 :     and emit_fmove_op x = emit (asm_fmove_op x)
254 :     and asm_fsize (I.FP32) = "s"
255 :     | asm_fsize (I.FP64) = "l"
256 :     and emit_fsize x = emit (asm_fsize x)
257 :     and asm_isize (I.I8) = "8"
258 :     | asm_isize (I.I16) = "16"
259 :     | asm_isize (I.I32) = "32"
260 :     | asm_isize (I.I64) = "64"
261 :     and emit_isize x = emit (asm_isize x)
262 :    
263 : mrainey 2783 (*#line 470.7 "amd64/amd64.mdl"*)
264 : mrainey 2619 fun emitInt32 i =
265 :     let
266 : mrainey 2783 (*#line 470.29 "amd64/amd64.mdl"*)
267 : mrainey 2619 val s = Int32.toString i
268 :    
269 : mrainey 2783 (*#line 471.10 "amd64/amd64.mdl"*)
270 : mrainey 2619 val s = (if (i >= 0)
271 :     then s
272 :     else ("-" ^ (String.substring (s, 1, (size s) - 1))))
273 :     in emit s
274 :     end
275 :    
276 : mrainey 2783 (*#line 476.7 "amd64/amd64.mdl"*)
277 : mrainey 2619 val {low=SToffset, ...} = C.cellRange CellsBasis.FP
278 :    
279 : mrainey 2783 (*#line 478.7 "amd64/amd64.mdl"*)
280 : mrainey 2619 fun emitScale 0 = emit "1"
281 :     | emitScale 1 = emit "2"
282 :     | emitScale 2 = emit "4"
283 :     | emitScale 3 = emit "8"
284 :     | emitScale _ = error "emitScale"
285 :     and eImmed (I.Immed i) = emitInt32 i
286 :     | eImmed (I.ImmedLabel lexp) = emit_labexp lexp
287 :     | eImmed _ = error "eImmed"
288 :     and emit_operand opn =
289 :     (case opn of
290 :     I.Immed i =>
291 :     ( emit "$";
292 :     emitInt32 i )
293 :     | I.ImmedLabel lexp =>
294 :     ( emit "$";
295 :     emit_labexp lexp )
296 :     | I.LabelEA le => emit_labexp le
297 :     | I.Relative _ => error "emit_operand"
298 :     | I.Direct(ty, r) => emit (CellsBasis.toStringWithSize (r, ty))
299 :     | I.FDirect f => emit (CellsBasis.toString f)
300 :     | I.Displace{base, disp, mem, ...} =>
301 :     ( emit_disp disp;
302 :     emit "(";
303 :     emitCell base;
304 :     emit ")";
305 :     emit_region mem )
306 :     | I.Indexed{base, index, scale, disp, mem, ...} =>
307 :     ( emit_disp disp;
308 :     emit "(";
309 :    
310 :     (case base of
311 :     NONE => ()
312 :     | SOME base => emitCell base
313 :     );
314 :     comma ();
315 :     emitCell index;
316 :     comma ();
317 :     emitScale scale;
318 :     emit ")";
319 :     emit_region mem )
320 :     )
321 :     and emit_operand8 (I.Direct(_, r)) = emit (CellsBasis.toStringWithSize (r,
322 :     8))
323 :     | emit_operand8 opn = emit_operand opn
324 :     and emit_cell (r, sz) = emit (CellsBasis.toStringWithSize (r, sz))
325 :     and emit_disp (I.Immed 0) = ()
326 :     | emit_disp (I.Immed i) = emitInt32 i
327 :     | emit_disp (I.ImmedLabel lexp) = emit_labexp lexp
328 :     | emit_disp _ = error "emit_disp"
329 :    
330 : mrainey 2783 (*#line 522.7 "amd64/amd64.mdl"*)
331 : mrainey 2619 fun stupidGas (I.ImmedLabel lexp) = emit_labexp lexp
332 :     | stupidGas opnd =
333 :     ( emit "*";
334 :     emit_operand opnd )
335 :    
336 : mrainey 2783 (*#line 526.7 "amd64/amd64.mdl"*)
337 : mrainey 2619 fun isMemOpnd (I.FDirect f) = true
338 :     | isMemOpnd (I.LabelEA _) = true
339 :     | isMemOpnd (I.Displace _) = true
340 :     | isMemOpnd (I.Indexed _) = true
341 :     | isMemOpnd _ = false
342 :    
343 : mrainey 2783 (*#line 531.7 "amd64/amd64.mdl"*)
344 : mrainey 2619 fun chop fbinOp =
345 :     let
346 : mrainey 2783 (*#line 532.15 "amd64/amd64.mdl"*)
347 : mrainey 2619 val n = size fbinOp
348 :     in
349 :     (case Char.toLower (String.sub (fbinOp, n - 1)) of
350 :     (#"s" | #"l") => String.substring (fbinOp, 0, n - 1)
351 :     | _ => fbinOp
352 :     )
353 :     end
354 :    
355 : mrainey 2783 (*#line 538.7 "amd64/amd64.mdl"*)
356 : mrainey 2619 val emit_dst = emit_operand
357 :    
358 : mrainey 2783 (*#line 539.7 "amd64/amd64.mdl"*)
359 : mrainey 2619 val emit_src = emit_operand
360 :    
361 : mrainey 2783 (*#line 540.7 "amd64/amd64.mdl"*)
362 : mrainey 2619 val emit_opnd = emit_operand
363 :    
364 : mrainey 2783 (*#line 541.7 "amd64/amd64.mdl"*)
365 : mrainey 2619 val emit_opnd8 = emit_operand8
366 :    
367 : mrainey 2783 (*#line 542.7 "amd64/amd64.mdl"*)
368 : mrainey 2619 val emit_rsrc = emit_operand
369 :    
370 : mrainey 2783 (*#line 543.7 "amd64/amd64.mdl"*)
371 : mrainey 2619 val emit_lsrc = emit_operand
372 :    
373 : mrainey 2783 (*#line 544.7 "amd64/amd64.mdl"*)
374 : mrainey 2619 val emit_addr = emit_operand
375 :    
376 : mrainey 2783 (*#line 545.7 "amd64/amd64.mdl"*)
377 : mrainey 2619 val emit_src1 = emit_operand
378 :    
379 : mrainey 2783 (*#line 546.7 "amd64/amd64.mdl"*)
380 : mrainey 2619 val emit_ea = emit_operand
381 :    
382 : mrainey 2783 (*#line 547.7 "amd64/amd64.mdl"*)
383 : mrainey 2619 val emit_count = emit_operand
384 :     fun emitInstr' instr =
385 :     (case instr of
386 :     I.NOP => emit "nop"
387 :     | I.JMP(operand, list) =>
388 :     ( emit "jmp\t";
389 :     stupidGas operand )
390 :     | I.JCC{cond, opnd} =>
391 :     ( emit "j";
392 :     emit_cond cond;
393 :     emit "\t";
394 :     stupidGas opnd )
395 :     | I.CALL{opnd, defs, uses, return, cutsTo, mem, pops} =>
396 :     ( emit "call\t";
397 :     stupidGas opnd;
398 :     emit_region mem;
399 :     emit_defs defs;
400 :     emit_uses uses;
401 :     emit_cellset ("return", return);
402 :     emit_cutsTo cutsTo )
403 :     | I.CALLQ{opnd, defs, uses, return, cutsTo, mem, pops} =>
404 :     ( emit "call\t";
405 :     stupidGas opnd;
406 :     emit_region mem;
407 :     emit_defs defs;
408 :     emit_uses uses;
409 :     emit_cellset ("return", return);
410 :     emit_cutsTo cutsTo )
411 :     | I.ENTER{src1, src2} =>
412 :     ( emit "enter\t";
413 :     emit_operand src1;
414 :     emit ", ";
415 :     emit_operand src2 )
416 :     | I.LEAVE => emit "leave"
417 :     | I.RET option =>
418 :     ( emit "ret";
419 :    
420 :     (case option of
421 :     NONE => ()
422 :     | SOME e =>
423 :     ( emit "\t";
424 :     emit_operand e )
425 :     ))
426 :     | I.MOVE{mvOp, src, dst} =>
427 :     ( emit_move mvOp;
428 :     emit "\t";
429 :     emit_src src;
430 :     emit ", ";
431 :     emit_dst dst )
432 :     | I.LEAL{r32, addr} =>
433 :     ( emit "leal\t";
434 :     emit_addr addr;
435 :     emit ", ";
436 :     emit_cell (r32, 32))
437 :     | I.LEAQ{r64, addr} =>
438 :     ( emit "leaq\t";
439 :     emit_addr addr;
440 :     emit ", ";
441 :     emit_cell (r64, 64))
442 :     | I.CMPQ{lsrc, rsrc} =>
443 :     ( emit "cmpq\t";
444 :     emit_rsrc rsrc;
445 :     emit ", ";
446 :     emit_lsrc lsrc )
447 :     | I.CMPL{lsrc, rsrc} =>
448 :     ( emit "cmpl\t";
449 :     emit_rsrc rsrc;
450 :     emit ", ";
451 :     emit_lsrc lsrc )
452 :     | I.CMPW{lsrc, rsrc} =>
453 :     ( emit "cmpb\t";
454 :     emit_rsrc rsrc;
455 :     emit ", ";
456 :     emit_lsrc lsrc )
457 :     | I.CMPB{lsrc, rsrc} =>
458 :     ( emit "cmpb\t";
459 :     emit_rsrc rsrc;
460 :     emit ", ";
461 :     emit_lsrc lsrc )
462 :     | I.TESTQ{lsrc, rsrc} =>
463 :     ( emit "testq\t";
464 :     emit_rsrc rsrc;
465 :     emit ", ";
466 :     emit_lsrc lsrc )
467 :     | I.TESTL{lsrc, rsrc} =>
468 :     ( emit "testl\t";
469 :     emit_rsrc rsrc;
470 :     emit ", ";
471 :     emit_lsrc lsrc )
472 :     | I.TESTW{lsrc, rsrc} =>
473 :     ( emit "testw\t";
474 :     emit_rsrc rsrc;
475 :     emit ", ";
476 :     emit_lsrc lsrc )
477 :     | I.TESTB{lsrc, rsrc} =>
478 :     ( emit "testb\t";
479 :     emit_rsrc rsrc;
480 :     emit ", ";
481 :     emit_lsrc lsrc )
482 :     | I.BITOP{bitOp, lsrc, rsrc} =>
483 :     ( emit_bitOp bitOp;
484 :     emit "\t";
485 :     emit_rsrc rsrc;
486 :     emit ", ";
487 :     emit_lsrc lsrc )
488 :     | I.BINARY{binOp, src, dst} =>
489 :     (case (src, binOp) of
490 :     (I.Direct _,
491 :     ( I.SARQ |
492 :     I.SHRQ |
493 :     I.SHLQ |
494 :     I.SARL |
495 :     I.SHRL |
496 :     I.SHLL |
497 :     I.SARW |
498 :     I.SHRW |
499 :     I.SHLW |
500 :     I.SARB |
501 :     I.SHRB |
502 :     I.SHLB )) =>
503 :     ( emit_binaryOp binOp;
504 :     emit "\t%cl, ";
505 :     emit_dst dst )
506 :     | _ =>
507 :     ( emit_binaryOp binOp;
508 :     emit "\t";
509 :     emit_src src;
510 :     emit ", ";
511 :     emit_dst dst )
512 :     )
513 :     | I.SHIFT{shiftOp, src, dst, count} =>
514 :     (case count of
515 :     I.Direct(ty, ecx) =>
516 :     ( emit_shiftOp shiftOp;
517 :     emit "\t";
518 :     emit_src src;
519 :     emit ", ";
520 :     emit_dst dst )
521 :     | _ =>
522 :     ( emit_shiftOp shiftOp;
523 :     emit "\t";
524 :     emit_src src;
525 :     emit ", ";
526 :     emit_count count;
527 :     emit ", ";
528 :     emit_dst dst )
529 :     )
530 : mrainey 2811 | I.XCHG{lock, sz, src, dst} =>
531 :     ( (if lock
532 :     then (emit "lock\n\t")
533 :     else ());
534 :     emit "xchg";
535 :    
536 :     (case sz of
537 :     I.I8 => emit "b"
538 :     | I.I16 => emit "w"
539 :     | I.I32 => emit "l"
540 :     | I.I64 => emit "q"
541 :     );
542 :    
543 :     ( emit "\t";
544 :     emit_src src;
545 :     emit ", ";
546 :     emit_dst dst ) )
547 : mrainey 2619 | I.CMPXCHG{lock, sz, src, dst} =>
548 :     ( (if lock
549 :     then (emit "lock\n\t")
550 :     else ());
551 :     emit "cmpxchg";
552 :    
553 :     (case sz of
554 :     I.I8 => emit "b"
555 :     | I.I16 => emit "w"
556 :     | I.I32 => emit "l"
557 : mrainey 2638 | I.I64 => emit "q"
558 : mrainey 2619 );
559 :    
560 :     ( emit "\t";
561 :     emit_src src;
562 :     emit ", ";
563 :     emit_dst dst ) )
564 : mrainey 2805 | I.XADD{lock, sz, src, dst} =>
565 :     ( (if lock
566 :     then (emit "lock\n\t")
567 :     else ());
568 :     emit "xadd";
569 :    
570 :     (case sz of
571 :     I.I8 => emit "b"
572 :     | I.I16 => emit "w"
573 :     | I.I32 => emit "l"
574 :     | I.I64 => emit "q"
575 :     );
576 :    
577 :     ( emit "\t";
578 :     emit_src src;
579 :     emit ", ";
580 :     emit_dst dst ) )
581 : mrainey 2619 | I.MULTDIV{multDivOp, src} =>
582 :     ( emit_multDivOp multDivOp;
583 :     emit "\t";
584 :     emit_src src )
585 :     | I.MUL3{dst, src2, src1} =>
586 :     ( emit "imull\t$";
587 :     emitInt32 src2;
588 :     emit ", ";
589 :     emit_src1 src1;
590 :     emit ", ";
591 :     emit_cell (dst, 32))
592 :     | I.MULQ3{dst, src2, src1} =>
593 :     ( emit "imulq\t$";
594 :     emitInt32 src2;
595 :     emit ", ";
596 :     emit_src1 src1;
597 :     emit ", ";
598 :     emit_cell (dst, 64))
599 :     | I.UNARY{unOp, opnd} =>
600 :     ( emit_unaryOp unOp;
601 :     emit "\t";
602 :     emit_opnd opnd )
603 :     | I.SET{cond, opnd} =>
604 :     ( emit "set";
605 :     emit_cond cond;
606 :     emit "\t";
607 :     emit_opnd8 opnd )
608 :     | I.CMOV{cond, src, dst} =>
609 :     ( emit "cmov";
610 :     emit_cond cond;
611 :     emit "\t";
612 :     emit_src src;
613 :     emit ", ";
614 :     emitCell dst )
615 :     | I.PUSHQ operand =>
616 :     ( emit "pushq\t";
617 :     emit_operand operand )
618 :     | I.PUSHL operand =>
619 :     ( emit "pushl\t";
620 :     emit_operand operand )
621 :     | I.PUSHW operand =>
622 :     ( emit "pushw\t";
623 :     emit_operand operand )
624 :     | I.PUSHB operand =>
625 :     ( emit "pushb\t";
626 :     emit_operand operand )
627 :     | I.PUSHFD => emit "pushfd"
628 :     | I.POPFD => emit "popfd"
629 :     | I.POP operand =>
630 :     ( emit "popq\t";
631 :     emit_operand operand )
632 :     | I.CDQ => emit "cdq"
633 :     | I.INTO => emit "int $4"
634 :     | I.FMOVE{fmvOp, dst, src} =>
635 :     ( emit_fmove_op fmvOp;
636 :     emit "\t ";
637 :     emit_src src;
638 :     emit ", ";
639 :     emit_dst dst )
640 :     | I.FBINOP{binOp, dst, src} =>
641 :     ( emit_fbin_op binOp;
642 :     emit "\t ";
643 :     emitCell src;
644 :     emit ", ";
645 :     emitCell dst )
646 :     | I.FCOM{comOp, dst, src} =>
647 :     ( emit_fcom_op comOp;
648 :     emit "\t ";
649 :     emit_src src;
650 :     emit ", ";
651 :     emitCell dst )
652 : mrainey 2638 | I.FSQRTS{dst, src} =>
653 :     ( emit "sqrtss\t ";
654 :     emit_src src;
655 :     emit ", ";
656 :     emit_dst dst )
657 :     | I.FSQRTD{dst, src} =>
658 :     ( emit "sqrtsd\t ";
659 :     emit_src src;
660 :     emit ", ";
661 :     emit_dst dst )
662 : mrainey 2808 | I.XORPS{dst, src} =>
663 :     ( emit "xorps\t ";
664 :     emit_src src;
665 :     emit ", ";
666 :     emit_dst dst )
667 :     | I.XORPD{dst, src} =>
668 :     ( emit "xorpd\t ";
669 :     emit_src src;
670 :     emit ", ";
671 :     emit_dst dst )
672 : mrainey 2619 | I.SAHF => emit "sahf"
673 :     | I.LAHF => emit "lahf"
674 :     | I.SOURCE{} => emit "source"
675 :     | I.SINK{} => emit "sink"
676 :     | I.PHI{} => emit "phi"
677 :     )
678 :     in tab(); emitInstr' instr; nl()
679 :     end (* emitter *)
680 :     and emitInstrIndented i = (indent(); emitInstr i; nl())
681 :     and emitInstrs instrs =
682 :     app (if !indent_copies then emitInstrIndented
683 :     else emitInstr) instrs
684 :    
685 :     and emitInstr(I.ANNOTATION{i,a}) =
686 :     ( comment(Annotations.toString a);
687 :     nl();
688 :     emitInstr i )
689 :     | emitInstr(I.LIVE{regs, spilled}) =
690 :     comment("live= " ^ CellsBasis.CellSet.toString regs ^
691 :     "spilled= " ^ CellsBasis.CellSet.toString spilled)
692 :     | emitInstr(I.KILL{regs, spilled}) =
693 :     comment("killed:: " ^ CellsBasis.CellSet.toString regs ^
694 :     "spilled:: " ^ CellsBasis.CellSet.toString spilled)
695 :     | emitInstr(I.INSTR i) = emitter i
696 :     | emitInstr(I.COPY{k=CellsBasis.GP, sz, src, dst, tmp}) =
697 :     emitInstrs(Shuffle.shuffle{tmp=tmp, src=src, dst=dst})
698 :     | emitInstr(I.COPY{k=CellsBasis.FP, sz, src, dst, tmp}) =
699 :     emitInstrs(Shuffle.shufflefp{tmp=tmp, src=src, dst=dst})
700 :     | emitInstr _ = error "emitInstr"
701 :    
702 :     in S.STREAM{beginCluster=init,
703 :     pseudoOp=pseudoOp,
704 :     emit=emitInstr,
705 :     endCluster=fail,
706 :     defineLabel=defineLabel,
707 :     entryLabel=entryLabel,
708 :     comment=comment,
709 :     exitBlock=doNothing,
710 :     annotation=annotation,
711 :     getAnnotations=getAnnotations
712 :     }
713 :     end
714 :     end
715 :    

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