Home My Page Projects Code Snippets Project Openings SML/NJ
Summary Activity Forums Tracker Lists Tasks Docs Surveys News SCM Files

SCM Repository

[smlnj] Diff of /MLRISC/trunk/amd64/instructions/amd64Instr.sml
ViewVC logotype

Diff of /MLRISC/trunk/amd64/instructions/amd64Instr.sml

Parent Directory Parent Directory | Revision Log Revision Log | View Patch Patch

revision 2810, Wed Oct 24 07:43:56 2007 UTC revision 2811, Thu Oct 25 20:36:09 2007 UTC
# Line 238  Line 238 
238     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}
239     | BINARY of {binOp:binaryOp, src:operand, dst:operand}     | BINARY of {binOp:binaryOp, src:operand, dst:operand}
240     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}
241       | XCHG of {lock:bool, sz:isize, src:operand, dst:operand}
242     | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}     | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}
243     | XADD of {lock:bool, sz:isize, src:operand, dst:operand}     | XADD of {lock:bool, sz:isize, src:operand, dst:operand}
244     | MULTDIV of {multDivOp:multDivOp, src:operand}     | MULTDIV of {multDivOp:multDivOp, src:operand}
# Line 301  Line 302 
302     val bitop : {bitOp:bitOp, lsrc:operand, rsrc:operand} -> instruction     val bitop : {bitOp:bitOp, lsrc:operand, rsrc:operand} -> instruction
303     val binary : {binOp:binaryOp, src:operand, dst:operand} -> instruction     val binary : {binOp:binaryOp, src:operand, dst:operand} -> instruction
304     val shift : {shiftOp:shiftOp, src:operand, dst:operand, count:operand} -> instruction     val shift : {shiftOp:shiftOp, src:operand, dst:operand, count:operand} -> instruction
305       val xchg : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction
306     val cmpxchg : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction     val cmpxchg : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction
307     val xadd : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction     val xadd : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction
308     val multdiv : {multDivOp:multDivOp, src:operand} -> instruction     val multdiv : {multDivOp:multDivOp, src:operand} -> instruction
# Line 564  Line 566 
566     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}
567     | BINARY of {binOp:binaryOp, src:operand, dst:operand}     | BINARY of {binOp:binaryOp, src:operand, dst:operand}
568     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}
569       | XCHG of {lock:bool, sz:isize, src:operand, dst:operand}
570     | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}     | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}
571     | XADD of {lock:bool, sz:isize, src:operand, dst:operand}     | XADD of {lock:bool, sz:isize, src:operand, dst:operand}
572     | MULTDIV of {multDivOp:multDivOp, src:operand}     | MULTDIV of {multDivOp:multDivOp, src:operand}
# Line 625  Line 628 
628     and bitop = INSTR o BITOP     and bitop = INSTR o BITOP
629     and binary = INSTR o BINARY     and binary = INSTR o BINARY
630     and shift = INSTR o SHIFT     and shift = INSTR o SHIFT
631       and xchg = INSTR o XCHG
632     and cmpxchg = INSTR o CMPXCHG     and cmpxchg = INSTR o CMPXCHG
633     and xadd = INSTR o XADD     and xadd = INSTR o XADD
634     and multdiv = INSTR o MULTDIV     and multdiv = INSTR o MULTDIV

Legend:
Removed from v.2810  
changed lines
  Added in v.2811

root@smlnj-gforge.cs.uchicago.edu
ViewVC Help
Powered by ViewVC 1.0.0