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[smlnj] Diff of /MLRISC/trunk/amd64/instructions/amd64Instr.sml
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Diff of /MLRISC/trunk/amd64/instructions/amd64Instr.sml

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revision 3236, Mon Nov 3 14:10:44 2008 UTC revision 3237, Mon Nov 24 22:47:06 2008 UTC
# Line 245  Line 245 
245     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}
246     | BINARY of {binOp:binaryOp, src:operand, dst:operand}     | BINARY of {binOp:binaryOp, src:operand, dst:operand}
247     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}
    | XCHG of {lock:bool, sz:isize, src:operand, dst:operand}  
    | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}  
    | XADD of {lock:bool, sz:isize, src:operand, dst:operand}  
248     | MULTDIV of {multDivOp:multDivOp, src:operand}     | MULTDIV of {multDivOp:multDivOp, src:operand}
249     | MUL3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}     | MUL3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}
250     | MULQ3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}     | MULQ3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}
# Line 269  Line 266 
266     | FSQRTS of {dst:operand, src:operand}     | FSQRTS of {dst:operand, src:operand}
267     | FSQRTD of {dst:operand, src:operand}     | FSQRTD of {dst:operand, src:operand}
268     | SAHF     | SAHF
269       | LFENCE
270       | MFENCE
271       | SFENCE
272       | PAUSE
273       | XCHG of {lock:bool, sz:isize, src:operand, dst:operand}
274       | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}
275       | XADD of {lock:bool, sz:isize, src:operand, dst:operand}
276     | LAHF     | LAHF
277     | SOURCE of {}     | SOURCE of {}
278     | SINK of {}     | SINK of {}
# Line 307  Line 311 
311     val bitop : {bitOp:bitOp, lsrc:operand, rsrc:operand} -> instruction     val bitop : {bitOp:bitOp, lsrc:operand, rsrc:operand} -> instruction
312     val binary : {binOp:binaryOp, src:operand, dst:operand} -> instruction     val binary : {binOp:binaryOp, src:operand, dst:operand} -> instruction
313     val shift : {shiftOp:shiftOp, src:operand, dst:operand, count:operand} -> instruction     val shift : {shiftOp:shiftOp, src:operand, dst:operand, count:operand} -> instruction
    val xchg : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction  
    val cmpxchg : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction  
    val xadd : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction  
314     val multdiv : {multDivOp:multDivOp, src:operand} -> instruction     val multdiv : {multDivOp:multDivOp, src:operand} -> instruction
315     val mul3 : {dst:CellsBasis.cell, src2:Int32.int, src1:operand} -> instruction     val mul3 : {dst:CellsBasis.cell, src2:Int32.int, src1:operand} -> instruction
316     val mulq3 : {dst:CellsBasis.cell, src2:Int32.int, src1:operand} -> instruction     val mulq3 : {dst:CellsBasis.cell, src2:Int32.int, src1:operand} -> instruction
# Line 331  Line 332 
332     val fsqrts : {dst:operand, src:operand} -> instruction     val fsqrts : {dst:operand, src:operand} -> instruction
333     val fsqrtd : {dst:operand, src:operand} -> instruction     val fsqrtd : {dst:operand, src:operand} -> instruction
334     val sahf : instruction     val sahf : instruction
335       val lfence : instruction
336       val mfence : instruction
337       val sfence : instruction
338       val pause : instruction
339       val xchg : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction
340       val cmpxchg : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction
341       val xadd : {lock:bool, sz:isize, src:operand, dst:operand} -> instruction
342     val lahf : instruction     val lahf : instruction
343     val source : {} -> instruction     val source : {} -> instruction
344     val sink : {} -> instruction     val sink : {} -> instruction
# Line 576  Line 584 
584     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}     | BITOP of {bitOp:bitOp, lsrc:operand, rsrc:operand}
585     | BINARY of {binOp:binaryOp, src:operand, dst:operand}     | BINARY of {binOp:binaryOp, src:operand, dst:operand}
586     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}     | SHIFT of {shiftOp:shiftOp, src:operand, dst:operand, count:operand}
    | XCHG of {lock:bool, sz:isize, src:operand, dst:operand}  
    | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}  
    | XADD of {lock:bool, sz:isize, src:operand, dst:operand}  
587     | MULTDIV of {multDivOp:multDivOp, src:operand}     | MULTDIV of {multDivOp:multDivOp, src:operand}
588     | MUL3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}     | MUL3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}
589     | MULQ3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}     | MULQ3 of {dst:CellsBasis.cell, src2:Int32.int, src1:operand}
# Line 600  Line 605 
605     | FSQRTS of {dst:operand, src:operand}     | FSQRTS of {dst:operand, src:operand}
606     | FSQRTD of {dst:operand, src:operand}     | FSQRTD of {dst:operand, src:operand}
607     | SAHF     | SAHF
608       | LFENCE
609       | MFENCE
610       | SFENCE
611       | PAUSE
612       | XCHG of {lock:bool, sz:isize, src:operand, dst:operand}
613       | CMPXCHG of {lock:bool, sz:isize, src:operand, dst:operand}
614       | XADD of {lock:bool, sz:isize, src:operand, dst:operand}
615     | LAHF     | LAHF
616     | SOURCE of {}     | SOURCE of {}
617     | SINK of {}     | SINK of {}
# Line 636  Line 648 
648     and bitop = INSTR o BITOP     and bitop = INSTR o BITOP
649     and binary = INSTR o BINARY     and binary = INSTR o BINARY
650     and shift = INSTR o SHIFT     and shift = INSTR o SHIFT
    and xchg = INSTR o XCHG  
    and cmpxchg = INSTR o CMPXCHG  
    and xadd = INSTR o XADD  
651     and multdiv = INSTR o MULTDIV     and multdiv = INSTR o MULTDIV
652     and mul3 = INSTR o MUL3     and mul3 = INSTR o MUL3
653     and mulq3 = INSTR o MULQ3     and mulq3 = INSTR o MULQ3
# Line 660  Line 669 
669     and fsqrts = INSTR o FSQRTS     and fsqrts = INSTR o FSQRTS
670     and fsqrtd = INSTR o FSQRTD     and fsqrtd = INSTR o FSQRTD
671     and sahf = INSTR SAHF     and sahf = INSTR SAHF
672       and lfence = INSTR LFENCE
673       and mfence = INSTR MFENCE
674       and sfence = INSTR SFENCE
675       and pause = INSTR PAUSE
676       and xchg = INSTR o XCHG
677       and cmpxchg = INSTR o CMPXCHG
678       and xadd = INSTR o XADD
679     and lahf = INSTR LAHF     and lahf = INSTR LAHF
680     and source = INSTR o SOURCE     and source = INSTR o SOURCE
681     and sink = INSTR o SINK     and sink = INSTR o SINK

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Removed from v.3236  
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  Added in v.3237

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