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[smlnj] Diff of /MLRISC/trunk/amd64/mltree/amd64-gen.sml
 [smlnj] / MLRISC / trunk / amd64 / mltree / amd64-gen.sml

# Diff of /MLRISC/trunk/amd64/mltree/amd64-gen.sml

revision 2630, Wed May 30 15:30:49 2007 UTC revision 2631, Wed May 30 19:10:16 2007 UTC
# Line 806  Line 806
806              end              end
807
808          (* put a floating-point expression into a register *)          (* put a floating-point expression into a register *)
809          and fexpToReg (fty, e) =          and fexpToReg (fty, e) = (case e
(*(case e
810              of T.FREG (fty', r) => r              of T.FREG (fty', r) => r
811               | e => *)let               | e => let
812                 val r = newFreg ()                 val r = newFreg ()
813                 in                 in
814                   fexpr (fty, r, e, []);                   fexpr (fty, r, e, []);
815                   r                   r
816                 end                 end
817  (*          (* end case *))*)              (* end case *))
818
819          (* put a floating-point expression into an operand *)          (* put a floating-point expression into an operand *)
820          and foperand (fty, e) = (case e          and foperand (fty, e) = (case e
821              of T.FLOAD (fty, ea, mem) => address (ea, mem)              of T.FLOAD (fty, ea, mem) => address (ea, mem)
822                 | T.FREG (fty, r) => I.FDirect r
823               | e => I.FDirect (fexpToReg (fty, e))               | e => I.FDirect (fexpToReg (fty, e))
824              (* end case *))              (* end case *))
825
826          and fbinop (fty, binOp, a, b, d, an) = let          and fbinop (fty, binOp, a, b, d, an) = let
val aReg = fexpToReg (fty, a)
827              val bReg = fexpToReg (fty, b)              val bReg = fexpToReg (fty, b)
828              in              in
829                emit (I.FBINOP {binOp=binOp, dst=aReg, src=bReg});                fexpr (fty, d, a, []);
830                fcopy (fty, [d], [aReg], an)                mark (I.FBINOP {binOp=binOp, dst=d, src=bReg}, an)
831              end              end
832
833          and convertf2f (fromTy, toTy, e, d, an) = let          and convertf2f (fromTy, toTy, e, d, an) = let
# Line 1029  Line 1028
1028                       (case (l, r)                       (case (l, r)
1029                         of (I.FDirect lReg, I.FDirect _) => cmp (lReg, r, fcc)                         of (I.FDirect lReg, I.FDirect _) => cmp (lReg, r, fcc)
1030                          | (mem, I.FDirect rReg) =>                          | (mem, I.FDirect rReg) =>
1031                            cmp (rReg, r, T.Basis.swapFcond fcc)                            cmp (rReg, l, T.Basis.swapFcond fcc)
1032                          | (I.FDirect lReg, mem) => cmp (lReg, r, fcc)                          | (I.FDirect lReg, mem) => cmp (lReg, r, fcc)
1033                          | _ => let                          | _ => let
1034                            val tmpR = newFreg ()                            val tmpR = newFreg ()

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