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[smlnj] Diff of /MLRISC/trunk/amd64/mltree/amd64-gen.sml
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Diff of /MLRISC/trunk/amd64/mltree/amd64-gen.sml

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revision 3178, Sun Aug 3 21:15:25 2008 UTC revision 3179, Mon Aug 4 01:16:59 2008 UTC
# Line 864  Line 864 
864                   | T.LOAD (64, ea, mem) => genLoad (I.MOVQ, ea, mem)                   | T.LOAD (64, ea, mem) => genLoad (I.MOVQ, ea, mem)
865                   (* sign-extended loads *)                   (* sign-extended loads *)
866                   | T.SX (tTy, fTy, x) =>                   | T.SX (tTy, fTy, x) =>
867                     mark (I.MOVE {mvOp=O.loadSXOp (fTy, tTy), src=operand fTy x, dst=I.Direct(tTy, dst)},an)                     mark (I.MOVE {mvOp=O.loadSXOp (fTy, tTy), src=regOrMem(fTy, operand fTy x), dst=I.Direct(tTy, dst)},an)
868                   (* there is no movslq instruction, but movl suffices. *)                   (* there is no movslq instruction, but movl suffices. *)
869                   | T.ZX(64, 32, e) =>                   | T.ZX(64, 32, e) =>
870                     mark (I.MOVE {mvOp=I.MOVL, src=operand 32 e, dst=I.Direct(32, dst)},an)                     mark (I.MOVE {mvOp=I.MOVL, src=operand 32 e, dst=I.Direct(32, dst)},an)
871                   (* zero-extended loads *)                   (* zero-extended loads *)
872                   | T.ZX(tTy, fTy, e) =>                   | T.ZX(tTy, fTy, e) =>
873                     mark (I.MOVE {mvOp=O.loadZXOp (fTy, tTy), src=operand fTy e, dst=I.Direct(tTy, dst)},an)                     mark (I.MOVE {mvOp=O.loadZXOp (fTy, tTy), src=regOrMem(fTy, operand fTy e), dst=I.Direct(tTy, dst)},an)
874                   | T.CVTF2I (ty, roundingMd, fty, fExp) => let                   | T.CVTF2I (ty, roundingMd, fty, fExp) => let
875                    (* FIXME: handle the rounding mode *)                    (* FIXME: handle the rounding mode *)
876                     val mvOp = (case (fty, ty)                     val mvOp = (case (fty, ty)

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