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[smlnj] Diff of /MLRISC/trunk/amd64/staged-allocation/amd64-vararg-ccall-fn.sml
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Diff of /MLRISC/trunk/amd64/staged-allocation/amd64-vararg-ccall-fn.sml

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revision 3050, Fri May 30 05:11:56 2008 UTC revision 3051, Fri May 30 06:29:06 2008 UTC
# Line 14  Line 14 
14      structure C = AMD64Cells      structure C = AMD64Cells
15      structure CB = CellsBasis      structure CB = CellsBasis
16      structure CTy = CTypes      structure CTy = CTypes
17      structure SVID = AMD64SVIDFn(structure T = T)      structure CCall = AMD64SVIDFn(structure T = T)
18      structure VarargCCall = VarargCCallFn(      structure VarargCCall = VarargCCallFn(
19                                structure T = T                                structure T = T
20                                structure CCall = SVID                                structure CCall = CCall
21                                val gprParams = List.map #2 SVID.CCs.gprParams                                val gprParams = List.map #2 CCall.CCs.gprParams
22                                val fprParams = List.map #2 SVID.CCs.fprParams                                val fprParams = List.map #2 CCall.CCs.fprParams
23                                val spReg = SVID.spReg                                val spReg = CCall.spReg
24                                val wordTy = 64                                val wordTy = 64
25                                val newReg = C.newReg                                val newReg = C.newReg
26                              )                              )
     structure SA = SVID.SA  
27    
28      val wordTy = 64      val wordTy = 64
29      fun lit i = T.LI (T.I.fromInt (wordTy, i))      fun lit i = T.LI (T.I.fromInt (wordTy, i))
     val regToInt = CB.physicalRegisterNum  
   
   (* one step of staged allocation *)  
     fun allocateArg step (arg, (str, locs)) = let  
            val slot = SVID.slotOfCTy(VarargCCall.argToCTy arg)  
            val (str', [loc]) = SA.doStagedAllocation(str, step, [slot])  
            in  
              (str', loc :: locs)  
            end  
   
     fun encodeLoc (_, SA.REG (_, r), SVID.K_GPR) = (VarargCCall.GPR, regToInt r)  
       | encodeLoc (_, SA.REG (_, r), SVID.K_FPR) = (VarargCCall.FPR, regToInt r)  
       | encodeLoc (_, SA.BLOCK_OFFSET offB, SVID.K_GPR) = (VarargCCall.STK, offB)  
       | encodeLoc (_, SA.BLOCK_OFFSET offB, SVID.K_FPR) = (VarargCCall.STK, offB)  
       | encodeLoc (_, SA.NARROW (loc, w', k), _) = encodeLoc (w', loc, k)  
   
   (* takes a vararg and a location and returns the vararg triplet *)  
     fun varArgTriplet (arg, loc) = let  
            val (k, l) = encodeLoc loc  
            in  
              (arg, k, l)  
            end  
   
   (* takes a list of varargs and returns vararg triplets *)  
     fun encodeArgs args = let  
            val step = SA.mkStep SVID.CCs.callStages  
            val (str, locs) = List.foldl (allocateArg step) (SVID.CCs.str0, []) args  
            in  
               ListPair.mapEq varArgTriplet (args, List.rev locs)  
            end  
30    
31      fun callWithArgs (cFun, args) = let      fun callWithArgs (cFun, args) = let
32             val triplets = encodeArgs args             val triplets = VarargCCall.encodeArgs args
33             in             in
34                raise Fail "jump to the interpreter"                raise Fail "jump to the interpreter"
35             end             end
36    
37      fun genVarargs (cFun, args) =      fun genVarargs (cFun, args) =
38              T.MV(wordTy, C.rax, lit (List.length SVID.CCs.fprParams)) :: VarargCCall.genVarargs(cFun, args)              T.MV(wordTy, C.rax, lit (List.length CCall.CCs.fprParams)) :: VarargCCall.genVarargs(cFun, args)
39    
40    end (* AMD64VarargCCallFn *)    end (* AMD64VarargCCallFn *)

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