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[smlnj] Diff of /MLRISC/trunk/c-call/gen/c-call-fn.sml
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Diff of /MLRISC/trunk/c-call/gen/c-call-fn.sml

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revision 3218, Wed Aug 27 06:36:24 2008 UTC revision 3219, Wed Aug 27 06:37:41 2008 UTC
# Line 12  Line 12 
12      val offSp : T.I.machine_int -> T.rexp      val offSp : T.I.machine_int -> T.rexp
13    (* we assume that the address width is the same *)    (* we assume that the address width is the same *)
14      val wordTy : int      val wordTy : int
15      (* extract least significant bits *)
16        val lobits : {nBits : int, width : int, e : T.rexp} -> T.rexp
17      (* sign extend the expression *)
18        val sx : {fromWidth : int, toWidth : int, e : T.rexp} -> T.rexp
19      (* float to float conversion (change width) *)
20        val f2f : {fromWidth : int, toWidth : int, e : T.fexp} -> T.fexp
21    
22      structure SA : STAGED_ALLOCATION      structure SA : STAGED_ALLOCATION
23            where type reg_id = T.reg            where type reg_id = T.reg
# Line 87  Line 93 
93                T.STORE(wordTy, offSp offset, e, stack) :: stms                T.STORE(wordTy, offSp offset, e, stack) :: stms
94              | (ARG (e as T.REG _), SA.NARROW(SA.BLOCK_OFFSET(w, (K.GPR | K.STK), offset), w', (K.GPR | K.STK))) =>              | (ARG (e as T.REG _), SA.NARROW(SA.BLOCK_OFFSET(w, (K.GPR | K.STK), offset), w', (K.GPR | K.STK))) =>
95                (* register to stack with width conversion (gpr) *)                (* register to stack with width conversion (gpr) *)
96                T.STORE(w, offSp offset, T.SX(w, w', e), stack) :: stms                T.STORE(w, offSp offset, sx{fromWidth=w', toWidth=w, e=e}, stack) :: stms
97              | (ARG (T.LOAD (ty, e, rgn)), SA.REG (w, K.GPR, r)) =>              | (ARG (T.LOAD (ty, e, rgn)), SA.REG (w, K.GPR, r)) =>
98                (* memory to register (gpr) *)                (* memory to register (gpr) *)
99                copyToReg(w, r, T.LOAD (ty, T.ADD(wordTy, e, off), rgn)) @ stms                copyToReg(w, r, T.LOAD (ty, T.ADD(wordTy, e, off), rgn)) @ stms
100              | (ARG (T.LOAD (ty, e, rgn)), SA.NARROW(SA.REG (w, K.GPR, r), w', K.GPR)) =>              | (ARG (T.LOAD (ty, e, rgn)), SA.NARROW(SA.REG (w, K.GPR, r), w', K.GPR)) =>
101                (* memory to register with conversion (gpr) *)                (* memory to register with conversion (gpr) *)
102                copyToReg(w, r, T.SX(w, w', T.LOAD (w', T.ADD(wordTy, e, off), rgn))) @ stms                copyToReg(w, r, sx{fromWidth=w', toWidth=w, e=T.LOAD (w', T.ADD(wordTy, e, off), rgn)}) @ stms
103              | (ARG e, SA.REG (w, K.GPR, r)) =>              | (ARG e, SA.REG (w, K.GPR, r)) =>
104                (* expression to register *)                (* expression to register *)
105                copyToReg(w, r, e) @ stms                copyToReg(w, r, e) @ stms
106              | (ARG e, SA.NARROW (SA.REG(w, K.GPR, r), w', K.GPR)) =>              | (ARG e, SA.NARROW (SA.REG(w, K.GPR, r), w', K.GPR)) =>
107                (* expression to register with conversion *)                (* expression to register with conversion *)
108                copyToReg(w, r, T.SX(w, w', e)) @ stms                copyToReg(w, r, sx{fromWidth=w', toWidth=w, e=e}) @ stms
109              | (ARG (T.LOAD (ty, e, rgn)), SA.BLOCK_OFFSET(w, (K.GPR | K.STK), offset)) => let              | (ARG (T.LOAD (ty, e, rgn)), SA.BLOCK_OFFSET(w, (K.GPR | K.STK), offset)) => let
110                (* memory to stack (gpr) *)                (* memory to stack (gpr) *)
111                  val tmp = C.newReg ()                  val tmp = C.newReg ()
# Line 112  Line 118 
118                  val tmp = C.newReg ()                  val tmp = C.newReg ()
119                  in                  in
120                    T.STORE (w, offSp offset, T.REG (w, tmp), stack) ::                    T.STORE (w, offSp offset, T.REG (w, tmp), stack) ::
121                    T.MV (w, tmp, T.SX(w, w', T.LOAD (w', T.ADD(wordTy, e, off), rgn))) :: stms                    T.MV (w, tmp, sx{fromWidth=w', toWidth=w, e=T.LOAD (w', T.ADD(wordTy, e, off), rgn)}) :: stms
122                  end                  end
123              | (ARG e, SA.BLOCK_OFFSET(w, (K.GPR | K.STK), offset)) => let              | (ARG e, SA.BLOCK_OFFSET(w, (K.GPR | K.STK), offset)) => let
124                (* expression to stack (gpr) *)                (* expression to stack (gpr) *)
# Line 124  Line 130 
130                (* expression to stack with conversion (gpr) *)                (* expression to stack with conversion (gpr) *)
131                  val tmp = C.newReg ()                  val tmp = C.newReg ()
132                  in                  in
133                    T.STORE (w, offSp offset, T.REG (w, tmp), stack) :: T.MV (w, tmp, T.SX(w, w', e)) :: stms                    T.STORE (w, offSp offset, T.REG (w, tmp), stack) :: T.MV (w, tmp, sx{fromWidth=w', toWidth=w, e=e}) :: stms
134                  end                  end
135              | (FARG (e as T.FREG _), SA.BLOCK_OFFSET(w, (K.FPR | K.FSTK), offset)) =>              | (FARG (e as T.FREG _), SA.BLOCK_OFFSET(w, (K.FPR | K.FSTK), offset)) =>
136                (* register to stack (fpr) *)                (* register to stack (fpr) *)
# Line 134  Line 140 
140                copyToFReg(w, r, e) @ stms                copyToFReg(w, r, e) @ stms
141              | (FARG e, SA.NARROW(SA.REG(w, K.FPR, r), w', K.FPR)) =>              | (FARG e, SA.NARROW(SA.REG(w, K.FPR, r), w', K.FPR)) =>
142                (* expression to register with conversion (fpr) *)                (* expression to register with conversion (fpr) *)
143                copyToFReg(w, r, T.CVTF2F(w, w', e)) @ stms                copyToFReg(w', r, f2f{fromWidth=w, toWidth=w', e=e}) @ stms
144              | (ARG (T.LOAD (ty, e, rgn)), SA.REG(w, K.FPR, r)) =>              | (ARG (T.LOAD (ty, e, rgn)), SA.REG(w, K.FPR, r)) =>
145                (* memory to register (fpr) *)                (* memory to register (fpr) *)
146                copyToFReg(w, r, T.FLOAD (ty, T.ADD(wordTy, e, off), rgn)) @ stms                copyToFReg(w, r, T.FLOAD (ty, T.ADD(wordTy, e, off), rgn)) @ stms
# Line 150  Line 156 
156                  val tmp = C.newFreg ()                  val tmp = C.newFreg ()
157                  in                  in
158                    T.FSTORE (w, offSp offset, T.FREG (w, tmp), stack) ::                    T.FSTORE (w, offSp offset, T.FREG (w, tmp), stack) ::
159                    T.FMV (w, tmp, T.CVTF2F(w, w', T.FLOAD (w', T.ADD(wordTy, e, off), rgn))) :: stms                    T.FMV (w', tmp, f2f{fromWidth=w, toWidth=w', e=T.FLOAD (w', T.ADD(wordTy, e, off), rgn)}) :: stms
160                  end                  end
161              | (FARG (T.FLOAD (ty, e, rgn)), SA.BLOCK_OFFSET(w, (K.FPR | K.FSTK), offset)) => let              | (FARG (T.FLOAD (ty, e, rgn)), SA.BLOCK_OFFSET(w, (K.FPR | K.FSTK), offset)) => let
162                (* memory to stack (fpr) *)                (* memory to stack (fpr) *)
# Line 164  Line 170 
170                  val tmp = C.newFreg ()                  val tmp = C.newFreg ()
171                  in                  in
172                    T.FSTORE (w, offSp offset, T.FREG (w, tmp), stack) ::                    T.FSTORE (w, offSp offset, T.FREG (w, tmp), stack) ::
173                    T.FMV (w, tmp, T.CVTF2F(w, w', T.FLOAD (w, T.ADD(wordTy, e, off), rgn))) :: stms                    T.FMV (w', tmp, f2f{fromWidth=w, toWidth=w', e=T.FLOAD (w, T.ADD(wordTy, e, off), rgn)}) :: stms
174                  end                  end
175              | (FARG e, SA.BLOCK_OFFSET(w, (K.FPR | K.FSTK), offset)) => let              | (FARG e, SA.BLOCK_OFFSET(w, (K.FPR | K.FSTK), offset)) => let
176                (* expression to stack (fpr) *)                (* expression to stack (fpr) *)
# Line 176  Line 182 
182                (* expression to stack (fpr) *)                (* expression to stack (fpr) *)
183                  val tmp = C.newFreg ()                  val tmp = C.newFreg ()
184                  in                  in
185                    T.FSTORE (w, offSp offset, T.CVTF2F (w, w', T.FREG (w, tmp)), stack) :: T.FMV (w, tmp, e) :: stms                    T.FSTORE (w', offSp offset, f2f{fromWidth=w, toWidth=w', e=T.FREG (w, tmp)}, stack) :: T.FMV (w, tmp, e) :: stms
186                  end                  end
187                | (FARG _, SA.COMBINE _) =>
188                  raise Fail ""
189              | _ => raise Fail "invalid arg / loc pair"              | _ => raise Fail "invalid arg / loc pair"
190            (* end case *))            (* end case *))
191    
# Line 213  Line 221 
221                  val ([resultReg as T.GPR(T.REG(_, tmp))], copyResult') = readLoc(loc, ([], []))                  val ([resultReg as T.GPR(T.REG(_, tmp))], copyResult') = readLoc(loc, ([], []))
222                  val w = SA.width loc                  val w = SA.width loc
223                  in                  in
224                    (resultReg :: resultRegs, T.MV(w, tmp, T.ZX(w, w', T.REG (w', tmp))) :: copyResult' @ copyResult)                    (T.GPR(T.REG(w', tmp)) :: resultRegs,
225                       T.MV(w, tmp, lobits{nBits=w', width=w, e=T.REG (w', tmp)}) :: copyResult' @ copyResult)
226                  end                  end
227              | SA.REG(w, K.FPR, r) => let              | SA.REG(w, K.FPR, r) => let
228                  val resReg = C.newFreg()                  val resReg = C.newFreg()
# Line 225  Line 234 
234                  val ([resultReg as T.FPR(T.FREG(_, tmp))], copyResult') = readLoc(loc, ([], []))                  val ([resultReg as T.FPR(T.FREG(_, tmp))], copyResult') = readLoc(loc, ([], []))
235                  val w = SA.width loc                  val w = SA.width loc
236                  in                  in
237                     (resultReg :: resultRegs, T.FMV(w, tmp, T.CVTF2F(w, w', T.FREG(w', tmp))) :: copyResult' @ copyResult)                     (T.FPR(T.FREG(w', tmp)) :: resultRegs,
238                        T.FMV(w', tmp, f2f{fromWidth=w, toWidth=w', e=T.FREG(w', tmp)}) :: copyResult' @ copyResult)
239                  end                  end
240              | SA.COMBINE (l1, l2) => (              | SA.COMBINE (l1, l2) => (
241                  case (readLoc (l1, ([], [])), readLoc (l2, ([], [])))                  case (readLoc (l1, ([], [])), readLoc (l2, ([], [])))

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