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[smlnj] Diff of /MLRISC/trunk/c-call/varargs/interp/x86-gen-fn.sml
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Diff of /MLRISC/trunk/c-call/varargs/interp/x86-gen-fn.sml

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MLRISC/trunk/c-call/varargs/interp/x86-gen.sml revision 3223, Thu Sep 4 17:48:33 2008 UTC MLRISC/trunk/c-call/varargs/interp/x86-gen-fn.sml revision 3227, Thu Sep 18 06:06:40 2008 UTC
# Line 1  Line 1 
1  (* x86-gen.sml  (* x86-gen-fn.sml
2   *   *
3   * X86-specific portion of the interpreter.   * X86-specific portion of the interpreter.
4   *)   *)
5    
6  structure X86Gen =  functor X86GenFn (
7    struct          structure Gen : C_CALL_GEN
8            structure MLRISCGen : MLRISC_GEN
9              where T = Gen.T
10            val push : MLRISCGen.T.rexp -> MLRISCGen.T.stm
11            val leave : MLRISCGen.T.stm
12      ) = struct
13    
14      val defTy = 32      val defTy = 32
15    
16      structure T = X86MLTree      structure T = MLRISCGen.T
17      structure C = X86Cells      structure C = X86Cells
18      structure CB = CellsBasis      structure CB = CellsBasis
19      structure Consts = VarargConstants      structure Consts = VarargConstants
20    
21      fun gpr r = T.GPR(T.REG(32, r))      fun gpr r = T.GPR(T.REG(32, r))
22      val calleeSaveRegs = List.map gpr [C.ebx, C.esi, C.edi]      val calleeSaveRegs = List.map gpr [C.ebx, C.esi, C.edi]
     fun push e = T.EXT(X86InstrExt.PUSHL e)  
     val leave = T.EXT X86InstrExt.LEAVE  
23    
24      structure Gen = GenFn (      structure InterpGen = GenFn (
25          structure T = T          structure T = Gen.T
26          val gprs = []          val gprs = []
27          val fprs = []          val fprs = []
28          val gprWidths = [8, 16, 32]          val gprWidths = [8, 16, 32]
# Line 27  Line 30 
30          val spReg = T.REG(32, C.esp)          val spReg = T.REG(32, C.esp)
31          val defaultWidth = 32          val defaultWidth = 32
32          val callerSaves = [C.eax, C.ecx, C.edx]          val callerSaves = [C.eax, C.ecx, C.edx]
33          val callerSavesF = [])          val callerSavesF = []
34            structure CCallGen = Gen
35            structure SA = Gen.SA)
36    
37      fun lit i = T.LI (T.I.fromInt (defTy, i))      fun lit i = T.LI (T.I.fromInt (defTy, i))
38    
# Line 51  Line 56 
56                     [T.MV(defTy, largsReg, getArg 1)],                     [T.MV(defTy, largsReg, getArg 1)],
57                   (* allocate stack space for the arguments *)                   (* allocate stack space for the arguments *)
58                     [T.MV(defTy, C.esp, T.SUB(defTy, T.REG(defTy, C.esp), lit frameSzB))],                     [T.MV(defTy, C.esp, T.SUB(defTy, T.REG(defTy, C.esp), lit frameSzB))],
59                     Gen.gen {interpFunPtr=interpFunPtr, largsReg=largsReg, endOfLargs=endOfLargs},                     InterpGen.gen {interpFunPtr=interpFunPtr, largsReg=largsReg, endOfLargs=endOfLargs},
60                     [leave],                     [leave],
61                     [T.LIVE calleeSaveRegs],                     [T.LIVE calleeSaveRegs],
62                     [T.RET []]                     [T.RET []]
# Line 64  Line 69 
69             val stms = gen()             val stms = gen()
70             val asmOutStrm = TextIO.openOut "vararg-interp-x86-linux.s"             val asmOutStrm = TextIO.openOut "vararg-interp-x86-linux.s"
71             val _ = TextIO.output(asmOutStrm, Consts.header^"\n")             val _ = TextIO.output(asmOutStrm, Consts.header^"\n")
72             fun doit () = X86MLRISCGen.dumpOutput(X86MLRISCGen.codegen'(lab, stms, [T.GPR (T.REG (defTy, C.eax))]))             fun doit () = MLRISCGen.gen(lab, stms, [T.GPR (T.REG (defTy, C.eax))])
73             val _ = AsmStream.withStream asmOutStrm doit ()             val _ = AsmStream.withStream asmOutStrm doit ()
74             val _ = TextIO.closeOut asmOutStrm             val _ = TextIO.closeOut asmOutStrm
75             in             in

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