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[smlnj] Diff of /MLRISC/trunk/instructions/cells.sig
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Diff of /MLRISC/trunk/instructions/cells.sig

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revision 430, Wed Sep 8 09:47:00 1999 UTC revision 545, Thu Feb 24 13:56:44 2000 UTC
# Line 28  Line 28 
28  sig  sig
29     eqtype cellkind     eqtype cellkind
30     type cell = int     type cell = int
31       type ty   = int
32     type regmap = cell Intmap.intmap     type regmap = cell Intmap.intmap
33     exception Cells     exception Cells
34    
# Line 51  Line 52 
52         (* generate a new name for a virtual register *)         (* generate a new name for a virtual register *)
53     val newCell   : cellkind -> 'a -> cell     val newCell   : cellkind -> 'a -> cell
54    
        (* lookup the cellkind of a virtual register *)  
    val cellKind : cell -> cellkind  
   
        (* update the cellkind of a virtual register *)  
    val updateCellKind : cell * cellkind -> unit  
   
55         (* lookup the number of virtual registers in a cellkind *)         (* lookup the number of virtual registers in a cellkind *)
56     val numCell   : cellkind -> unit -> int     val numCell   : cellkind -> unit -> int
57    
# Line 98  Line 93 
93     val MEM  : cellkind  (* memory cell *)     val MEM  : cellkind  (* memory cell *)
94     val CTRL : cellkind  (* control dependence *)     val CTRL : cellkind  (* control dependence *)
95     val toString : cellkind -> cell -> string     val toString : cellkind -> cell -> string
96       val toStringWithType : cellkind -> cell * ty -> string
97     val stackptrR : cell                    (* stack pointer register *)     val stackptrR : cell                    (* stack pointer register *)
98     val asmTmpR : cell                      (* assembly temporary *)     val asmTmpR : cell                      (* assembly temporary *)
99     val fasmTmp : cell                      (* floating point temporary *)     val fasmTmp : cell                      (* floating point temporary *)

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