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[smlnj] Diff of /MLRISC/trunk/staged-allocation/test-staged-allocation.sml
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Diff of /MLRISC/trunk/staged-allocation/test-staged-allocation.sml

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revision 2999, Sun Apr 20 19:35:47 2008 UTC revision 3000, Tue Apr 22 08:01:00 2008 UTC
# Line 24  Line 24 
24                     proto=proto,                     proto=proto,
25                     args=args}                     args=args}
26    
27            fun wordLit i = T.LI (T.I.fromInt (wordTy, i))
28    
29            fun mv () = let
30                val r = C.newReg()
31                in
32                    [T.MV(wordTy, r, T.LOAD(wordTy, T.REG(wordTy, C.rsp), ())),
33                     T.MV(wordTy, C.rax, T.REG(wordTy, r))
34                    ]
35                end
36    
37            val fr = C.FPReg 10
38    
39            fun fmv () = let
40                val r = C.newFreg()
41                in
42                    [T.FMV(32, r, T.FLOAD(32, T.REG(wordTy, C.rsp), ())),
43                     T.FMV(32, fr, T.FREG(32, r))
44                    ]
45                end
46    
47          val stms = List.concat [          val stms = List.concat [
48                     [T.EXT(AMD64InstrExt.PUSHQ(T.REG(64, C.rbp))),                     [T.EXT(AMD64InstrExt.PUSHQ(T.REG(64, C.rbp))),
49                      T.COPY (wordTy, [C.rbp], [C.rsp])],                      T.COPY (wordTy, [C.rbp], [C.rsp])],
50                     initStms,                     initStms,
51                     callseq,                     callseq,
52    (*                  mv(), *)
53                     [T.EXT(AMD64InstrExt.LEAVE)],                     [T.EXT(AMD64InstrExt.LEAVE)],
54                     [T.RET []]]                     [T.RET []]]
55    
# Line 49  Line 70 
70              pseudoOp (PseudoOpsBasisTyp.EXPORT [functionName]);              pseudoOp (PseudoOpsBasisTyp.EXPORT [functionName]);
71              entryLabel functionName; (* define the entry label *)              entryLabel functionName; (* define the entry label *)
72              List.app emit stms; (* emit all the statements *)              List.app emit stms; (* emit all the statements *)
73              exitBlock result;              exitBlock (T.FPR (T.FREG (32, fr)) :: T.GPR (T.REG (32, C.rax)) :: result);
74              endCluster [])              endCluster [])
75          val cfg = doit ()          val cfg = doit ()
76          val cfg = AMD64RA.run cfg          val cfg = AMD64RA.run cfg

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