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[smlnj] Log of /MLRISC/trunk/x86/instructions/x86comp-instr-ext.sml
[smlnj] / MLRISC / trunk / x86 / instructions / x86comp-instr-ext.sml  
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Log of /MLRISC/trunk/x86/instructions/x86comp-instr-ext.sml

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Revision 3241 - (view) (download) (annotate) - [select for diffs]
Modified Wed Dec 3 02:36:43 2008 UTC (10 years, 7 months ago) by mrainey
File length: 2452 byte(s)
Diff to previous 2126
  New concurrency instructions for x86: mfence, lfence, sfence, and pause.

Revision 2126 - (view) (download) (annotate) - [select for diffs]
Modified Thu Nov 2 16:11:29 2006 UTC (12 years, 8 months ago) by blume
File length: 2301 byte(s)
Diff to previous 1053
moved MLRISC to toplevel

Revision 1053 - (view) (download) (annotate) - [select for diffs]
Modified Wed Feb 6 19:11:13 2002 UTC (17 years, 5 months ago) by george
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 2301 byte(s)
Diff to previous 1003
   Pulled out various utility modules that were embedded in the modules
   of the register allocator. I need these modules for other purposes, but
   they are not complete enough to put into a library (just yet).

Revision 1003 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 7 02:45:32 2001 UTC (17 years, 7 months ago) by george
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 2298 byte(s)
Diff to previous 984
Changed the representation of instructions from being fully abstract
to being partially concrete. That is to say:

  from
	type instruction

  to
	type instr				(* machine instruction *)

	datatype instruction =
	    LIVE of {regs: C.cellset, spilled: C.cellset}
          | KILL of {regs: C.cellset, spilled: C.cellset}
          | COPYXXX of {k: CB.cellkind, dst: CB.cell list, src: CB.cell list}
          | ANNOTATION of {i: instruction, a: Annotations.annotation}
          | INSTR of instr

This makes the handling of certain special instructions that appear on
all architectures easier and uniform.

LIVE and KILL say that a list of registers are live or killed at the
program point where they appear. No spill code is generated when an
element of the 'regs' field is spilled, but the register is moved to
the 'spilled' (which is present, more for debugging than anything else).

LIVE replaces the (now deprecated) DEFFREG instruction on the alpha.
We used to generate:

	DEFFREG f1
	f1 := f2 + f3
        trapb

but now generate:

	f1 := f2 + f3
	trapb
	LIVE {regs=[f1,f2,f3], spilled=[]}

Furthermore, the DEFFREG (hack) required that all floating point instruction
use all registers mentioned in the instruction. Therefore f1 := f2 + f3,
defines f1 and uses [f1,f2,f3]! This hack is no longer required resulting
in a cleaner alpha implementation. (Hopefully, intel will not get rid of
this architecture).

COPYXXX is intended to replace the parallel COPY and FCOPY  available on
all the architectures. This will result in further simplification of the
register allocator that must be aware of them for coalescing purposes, and
will also simplify certain aspects of the machine description that provides
callbacks related to parallel copies.

ANNOTATION should be obvious, and now INSTR represents the honest to God
machine instruction set!

The <arch>/instructions/<arch>Instr.sml files define certain utility
functions for making porting easier -- essentially converting upper case
to lower case. All machine instructions (of type instr) are in upper case,
and the lower case form generates an MLRISC instruction. For example on
the alpha we have:

  datatype instr =
     LDA of {r:cell, b:cell, d:operand}
   | ...

  val lda : {r:cell, b:cell, d:operand} -> instruction
    ...

where lda is just (INSTR o LDA), etc.

Revision 984 - (view) (download) (annotate) - [select for diffs]
Modified Wed Nov 21 19:00:08 2001 UTC (17 years, 8 months ago) by george
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 2289 byte(s)
Diff to previous 909
  Implemented a complete redesign of MLRISC pseudo-ops. Now there
  ought to never be any question of incompatabilities with
  pseudo-op syntax expected by host assemblers.

  For now, only modules supporting GAS syntax are implemented
  but more should follow, such as MASM, and vendor assembler
  syntax, e.g. IBM as, Sun as, etc.

Revision 909 - (view) (download) (annotate) - [select for diffs]
Modified Fri Aug 24 17:48:53 2001 UTC (17 years, 10 months ago) by george
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 2094 byte(s)
Diff to previous 815
removed clusters from MLRISC

Revision 815 - (view) (download) (annotate) - [select for diffs]
Modified Fri May 4 05:09:10 2001 UTC (18 years, 2 months ago) by leunga
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 1951 byte(s)
Diff to previous 797

    Moby related MLRISC changes

Revision 797 - (view) (download) (annotate) - [select for diffs]
Modified Fri Mar 16 00:00:17 2001 UTC (18 years, 4 months ago) by leunga
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 1811 byte(s)
Diff to previous 775

   x86 optimizations for x := x op y where x is a memory location.

Revision 775 - (view) (download) (annotate) - [select for diffs]
Modified Fri Jan 12 01:17:51 2001 UTC (18 years, 6 months ago) by leunga
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 1695 byte(s)
Diff to previous 744

    Merging the types labexp and mltree.
    tag leunga-20010111-labexp=mltree

Revision 744 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 8 04:11:42 2000 UTC (18 years, 7 months ago) by leunga
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 1769 byte(s)
Diff to previous 651

   A CVS update record!

   Changed type cell from int to datatype, and numerous other changes.
   Affect every client of MLRISC.  Lal says this can be bootstrapped on all
   machines.  See smlnj/HISTORY for details.

   Tag:  leunga-20001207-cell-monster-hack

Revision 651 - (view) (download) (annotate) - [select for diffs]
Modified Thu Jun 1 18:34:03 2000 UTC (19 years, 1 month ago) by monnier
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 1793 byte(s)
Diff to previous 600
bring revisions from the vendor branch to the trunk

Revision 600 - (view) (download) (annotate) - [select for diffs]
Modified Wed Apr 5 20:13:47 2000 UTC (19 years, 3 months ago) by george
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 1793 byte(s)
Diff to previous 562
  x86 instructions to support c-calls

Revision 562 - (view) (download) (annotate) - [select for diffs]
Added Fri Mar 3 16:22:42 2000 UTC (19 years, 4 months ago) by george
Original Path: sml/trunk/src/MLRISC/x86/instructions/x86comp-instr-ext.sml
File length: 2353 byte(s)
lal-20000303-support for C calls

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