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[smlnj] Diff of /MLRISC/trunk/x86/staged-allocation/ia32-svid-fn.sml
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Diff of /MLRISC/trunk/x86/staged-allocation/ia32-svid-fn.sml

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revision 3048, Thu May 29 22:14:42 2008 UTC revision 3049, Fri May 30 00:58:55 2008 UTC
# Line 62  Line 62 
62      val wordTy = 32      val wordTy = 32
63      fun gpr r = T.GPR(T.REG(32, r))      fun gpr r = T.GPR(T.REG(32, r))
64      fun fpr f = T.FPR(T.FREG(80, f))      fun fpr f = T.FPR(T.FREG(80, f))
65        val spReg = T.REG (32, C.esp)
66    
67        structure CCall = CCallFn(
68                 structure T = T
69                 structure C = C
70                 val wordTy = wordTy
71                 fun offSp 0 = spReg
72                   | offSp offset = T.ADD (32, spReg, T.LI offset))
73    
74    (* kinds of locations for staged allocation *)      datatype c_arg = datatype CCall.c_arg
75      datatype location_kind      datatype arg_location = datatype CCall.arg_location
76        = K_GPR                   (* pass in general purpose registers *)      datatype location_kinds = datatype CCall.location_kinds
       | K_FPR                   (* pass in floating-point registers *)  
77    
   (* staged allocation *)  
78      structure SA = StagedAllocationFn (      structure SA = StagedAllocationFn (
79                      structure T = T                      type reg = T.reg
80                      structure TargetLang =                      datatype location_kinds = datatype location_kinds
                       struct  
                         datatype location_kind = datatype location_kind  
                       end  
81                      val memSize = 8)                      val memSize = 8)
82    
83        val calleeSaveRegs = [C.eax, C.ecx, C.edx]
84        val callerSaveRegs = [C.ebx, C.esi, C.edi]
85        val calleeSaveFRegs = []
86        val callerSaveFRegs = []
87    
88    (* calling conventions in the Staged Allocation language *)    (* calling conventions in the Staged Allocation language *)
89      structure CCs =      structure CCs =
90        struct        struct
91    
92        (* register conventions *)        (* register conventions *)
93          val callerSaveRegs = List.map gpr [C.eax, C.ecx, C.edx]          val callerSaveRegs = List.map gpr calleeSaveRegs
94          val calleeSaveRegs = List.map gpr [C.ebx, C.esi, C.edi]          val calleeSaveRegs = List.map gpr calleeSaveRegs
95          val spReg = T.REG (32, C.esp)          val calleeSaveFRegs = []
96            val callerSaveFRegs = []
97    
98        (* the C calling convention requires that the FP stack be empty on function        (* the C calling convention requires that the FP stack be empty on function
99         * entry.  We add the fpStk list to the defs when the fast_floating_point flag         * entry.  We add the fpStk list to the defs when the fast_floating_point flag
100         * is set.         * is set.
101         *)         *)
102          val st0 = C.ST 0          val st0 = C.ST 0
         val calleeSaveFRegs = []  
103        (* the C calling convention requires that the FP stack be empty on function        (* the C calling convention requires that the FP stack be empty on function
104         * entry.  We add the fpStk list to the defs when the fast_floating_point flag         * entry.  We add the fpStk list to the defs when the fast_floating_point flag
105         * is set.         * is set.
# Line 125  Line 134 
134          (* initial store *)          (* initial store *)
135          val str0 = SA.init [cInt, cFloat, cStack]          val str0 = SA.init [cInt, cFloat, cStack]
136    
137        end (* CallingConventions *)        end (* CCs *)
   
     structure CCall = CCallFn(  
              structure T = T  
              structure C = C  
              val wordTy = wordTy  
              fun offSp 0 = CCs.spReg  
                | offSp offset = T.ADD (32, CCs.spReg, T.LI offset))  
   
     datatype c_arg = datatype CCall.c_arg  
138    
139      (* classify a C type into its location kind (assuming that aggregates cannot be passed in registers) *)      (* classify a C type into its location kind (assuming that aggregates cannot be passed in registers) *)
140      fun kindOfCTy (CTy.C_float | CTy.C_double | CTy.C_long_double) = K_FPR      fun kindOfCTy (CTy.C_float | CTy.C_double | CTy.C_long_double) = K_FPR
# Line 261  Line 261 
261          (* instruction to allocate space for arguments *)          (* instruction to allocate space for arguments *)
262            val argAlloc = if ((#szb argMem = 0) orelse paramAlloc argMem)            val argAlloc = if ((#szb argMem = 0) orelse paramAlloc argMem)
263                  then []                  then []
264                  else [T.MV(wordTy, C.esp, T.SUB(wordTy, CCs.spReg, T.LI(IntInf.fromInt(#szb argMem))))]                  else [T.MV(wordTy, C.esp, T.SUB(wordTy, spReg, T.LI(IntInf.fromInt(#szb argMem))))]
265            val (copyArgs, gprUses, fprUses) = CCall.copyArgs(args, argLocs)            val (copyArgs, gprUses, fprUses) = CCall.copyArgs(args, argLocs)
266    
267          (* the SVID specifies that the caller pops arguments, but the callee          (* the SVID specifies that the caller pops arguments, but the callee
# Line 279  Line 279 
279          (* code to pop the arguments from the stack *)          (* code to pop the arguments from the stack *)
280            val popArgs = if calleePops orelse (explicitArgSzB = 0)            val popArgs = if calleePops orelse (explicitArgSzB = 0)
281                  then []                  then []
282                  else [T.MV(wordTy, C.esp, T.ADD(wordTy, CCs.spReg, T.LI(IntInf.fromInt explicitArgSzB)))]                  else [T.MV(wordTy, C.esp, T.ADD(wordTy, spReg, T.LI(IntInf.fromInt explicitArgSzB)))]
283    
284          (* code to copy the result into fresh pseudo registers *)          (* code to copy the result into fresh pseudo registers *)
285            val (resultRegs, copyResult) = (case resLocs            val (resultRegs, copyResult) = (case resLocs

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