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[smlnj] Diff of /MLRISC/trunk/x86/staged-allocation/ia32-vararg-ccall-fn.sml
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Diff of /MLRISC/trunk/x86/staged-allocation/ia32-vararg-ccall-fn.sml

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revision 3063, Thu Jun 5 00:42:15 2008 UTC revision 3064, Thu Jun 5 07:20:32 2008 UTC
# Line 52  Line 52 
52             val lab = Label.global "varargs"             val lab = Label.global "varargs"
53             val args = C.newReg()             val args = C.newReg()
54             val cFun = C.newReg()             val cFun = C.newReg()
55            (* we align the frame to a 16-bytes to support Mac OS. *)
56               val frameSzB = 1024*4-2*4
57               val endOfArgs = raise Fail "todo"
58             in             in
59                (lab,                (lab,
60                 List.concat [                 List.concat [
# Line 61  Line 64 
64                     [T.MV(wordTy, cFun, getArg 0)],                     [T.MV(wordTy, cFun, getArg 0)],
65                     [T.MV(wordTy, args, getArg 1)],                     [T.MV(wordTy, args, getArg 1)],
66                   (* allocate stack space for the arguments *)                   (* allocate stack space for the arguments *)
67                     [T.MV(wordTy, C.esp, T.SUB(wordTy, T.REG(wordTy, C.esp), getArg 2))],                     [T.MV(wordTy, C.esp, T.SUB(wordTy, T.REG(wordTy, C.esp), lit frameSzB))],
68                     VarargCCall.genVarargs (T.REG(wordTy, cFun), args),                     VarargCCall.genVarargs (T.REG(wordTy, cFun), args, endOfArgs),
69                     [leave],                     [leave],
70                     [T.LIVE CCall.CCs.calleeSaveRegs],                     [T.LIVE CCall.CCs.calleeSaveRegs],
71                     [T.RET []]                     [T.RET []]

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