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[smlnj] Annotation of /sml/branches/SMLNJ/src/MLRISC/hppa/emit/hppaAsm.sml
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Annotation of /sml/branches/SMLNJ/src/MLRISC/hppa/emit/hppaAsm.sml

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1 : monnier 245 (* hppaAsm.sml
2 :     *
3 :     * COPYRIGHT (c) 1996 Bell Laboratories.
4 :     *
5 :     *)
6 :    
7 :     functor HppaAsmEmitter
8 :     (structure Instr : HPPAINSTR
9 :     structure PseudoOps : PSEUDO_OPS
10 :     structure Shuffle : HPPASHUFFLE where I = Instr) : EMITTER_NEW =
11 :     struct
12 :     structure I = Instr
13 :     structure C = I.C
14 :     structure P = PseudoOps
15 :     structure LE = LabelExp
16 :     structure Constant = I.Constant
17 :     structure Region = I.Region
18 :    
19 :     fun ms n = if n<0 then ("-"^ Int.toString (~n)) else Int.toString n
20 :    
21 :     fun error msg = MLRiscErrorMsg.impossible ("HppaAsEmitter." ^ msg)
22 :    
23 :     fun emit s = TextIO.output(!AsmStream.asmOutStream,s)
24 :    
25 :     fun defineLabel(lab) = emit(Label.nameOf lab ^ "\n")
26 :    
27 :     fun comment msg = emit ("\t/* " ^ msg ^ " */")
28 :     fun region r = comment(Region.toString r)
29 :     fun pseudoOp pOp = emit(P.toString pOp)
30 :     fun init size = (comment ("Code Size = " ^ ms size); emit"\n")
31 :    
32 :     fun emitInstr(instr,regmap) = let
33 :     fun rmap r = Intmap.map regmap r handle _ => r
34 :     fun eReg r = emit ("%r" ^ ms(rmap r))
35 :     fun eFreg f = emit ("%f" ^ ms(rmap f))
36 :     fun emitCreg c = emit ("%f" ^ ms c)
37 :     fun eLabel lab = emit (Label.nameOf lab)
38 :     fun comma() = emit ", "
39 :     fun tab() = emit "\t"
40 :     fun newline () = emit "\n"
41 :     fun paren f = (emit "("; f(); emit ")")
42 :     fun prList l = let
43 :     fun pr [] = emit "]"
44 :     | pr [r] = (eReg r; pr [])
45 :     | pr (r::rs) = (eReg r; emit ","; pr rs)
46 :     in emit "["; pr l
47 :     end
48 :     fun cond I.EQ = "="
49 :     | cond I.LT = "<"
50 :     | cond I.LE = "<="
51 :     | cond I.LTU = "<<"
52 :     | cond I.LEU = "<<="
53 :     | cond I.NE = "<>"
54 :     | cond I.GE = ">="
55 :     | cond I.GT = ">"
56 :     | cond I.GTU = ">>"
57 :     | cond I.GEU = ">>="
58 :    
59 :     fun fcond I.? = "?"
60 :     | fcond I.!<=> = "!<=>"
61 :     | fcond I.== = "=="
62 :     | fcond I.?= = "?="
63 :     | fcond I.!<> = "!<>"
64 :     | fcond I.!?>= = "!?>="
65 :     | fcond I.< = "<"
66 :     | fcond I.?< = "?<"
67 :     | fcond I.!>= = "!>="
68 :     | fcond I.!?> = "!?>"
69 :     | fcond I.<= = "<="
70 :     | fcond I.?<= = "?<+"
71 :     | fcond I.!> = "!>"
72 :     | fcond I.!?<= = "!?<="
73 :     | fcond I.> = ">"
74 :     | fcond I.?> = "?>"
75 :     | fcond I.!<= = "!<="
76 :     | fcond I.!?< = "!?<"
77 :     | fcond I.>= = ">="
78 :     | fcond I.?>= = "?>="
79 :     | fcond I.!< = "!<"
80 :     | fcond I.!?= = "!?="
81 :     | fcond I.<> = "<>"
82 :     | fcond I.!= = "!="
83 :     | fcond I.!? = "!?"
84 :     | fcond I.<=> = "<=>"
85 :    
86 :     fun emitFieldSel fs =
87 :     emit(case fs
88 :     of I.F => "F'"
89 :     | I.T => ""
90 :     | I.P => "P'"
91 :     | _ => error "emitFieldSel")
92 :    
93 :     fun emitHiFieldSel fs =
94 :     emit(case fs
95 :     of I.F => "L'"
96 :     | I.S => "LS'"
97 :     | I.D => "LD'"
98 :     | I.R => "LR'"
99 :     | I.T => "LT'"
100 :     | I.P => "LP'")
101 :    
102 :     fun emitLoFieldSel fs =
103 :     emit(case fs
104 :     of I.F => "R'"
105 :     | I.S => "RS'"
106 :     | I.D => "RD'"
107 :     | I.R => "RR'"
108 :     | I.T => "RT'"
109 :     | I.P => "RP'")
110 :    
111 :     fun emitLExp lexp = emit(LabelExp.toString lexp)
112 :     fun eOperand(I.IMMED i) = emit (ms i)
113 :     | eOperand(I.LabExp(lexp, fs)) = (emitFieldSel fs; emitLExp lexp)
114 :     | eOperand(I.HILabExp(lexp, fs)) = (emitHiFieldSel fs; emitLExp lexp)
115 :     | eOperand(I.LOLabExp(lexp, fs)) = (emitLoFieldSel fs; emitLExp lexp)
116 :     | eOperand(I.ConstOp c) = emit(Constant.toString c)
117 :    
118 :     fun store(st, b, d, r, mem) =
119 :     (emit st; eReg r; comma(); eOperand d; paren(fn () => eReg b); region mem)
120 :     fun fstore(fst, b, d, r, mem) =
121 :     (emit fst; eFreg r; comma(); emit(ms d); paren(fn () => eReg b);
122 :     region mem)
123 :     fun fstorex(fstx, b, x, r, mem) =
124 :     (emit fstx; eFreg r; eReg x; paren(fn () => eReg b); region mem)
125 :     fun loadx(ld, r1, r2, t, mem) =
126 :     (emit ld; eReg r2; paren(fn () => eReg r1); comma(); eReg t; region mem)
127 :     fun floadx(flx, b, x, t, mem) =
128 :     (emit flx; eReg x; paren(fn () => eReg b); comma(); eFreg t; region mem)
129 :     fun arith(a, r1, r2, t) =
130 :     (emit a; eReg r1; comma(); eReg r2; comma(); eReg t)
131 :     fun loadi(ld, i, r, t, mem) =
132 :     (emit ld; eOperand i; paren(fn () => eReg r); comma(); eReg t; region mem)
133 :     fun fload(fl, b, d, t, mem) =
134 :     (emit fl; emit(ms d); paren(fn () => eReg b); comma(); eFreg t; region mem)
135 :     fun arithi(ai, i, r ,t) =
136 :     (emit ai; eOperand i; comma(); eReg r; comma(); eReg t)
137 :     fun cmp{cc, r1, r2, t} = arith("\tCOMCLR," ^ cond cc ^ "\t", r1, r2, t)
138 :     fun shiftv(sv, r, len, t) =
139 :     (emit sv; eReg r; comma(); emit(ms len); comma(); eReg t)
140 :     fun shift(s, r, p, len, t) =
141 :     (emit s; eReg r; comma();
142 :     emit(ms p); comma();
143 :     emit(ms len); comma(); eReg t)
144 :     fun emitCmp I.COMBT = emit "\tCOMBT,"
145 :     | emitCmp I.COMBF = emit "\tCOMBF,"
146 :     fun emitCmpi I.COMIBT = emit "\tCOMIBT,"
147 :     | emitCmpi I.COMIBF = emit "\tCOMIBF,"
148 :     fun nullify true = emit ",n"
149 :     | nullify false = ()
150 :     fun bcond{cmp, bc, r1, r2, t, f, n} =
151 :     (emitCmp cmp; emit (cond bc); nullify n; emit "\t";
152 :     eReg r1; comma(); eReg r2; comma(); eLabel t;
153 :     emit "\n\tNOP" )
154 :     fun bcondi{cmpi, bc, i, r2, t, f, n} =
155 :     (emitCmpi cmpi; emit (cond bc); nullify n; emit "\t";
156 :     emit(ms i); comma(); eReg r2; comma(); eLabel t;
157 :     emit "\n\tNOP")
158 :    
159 :     fun farith{fa, r1, r2, t} = let
160 :     val oper = case fa of I.FADD => "\tFADD\t" | I.FSUB => "\tFSUB\t"
161 :     | I.FDIV => "\tFDIV\t" | I.FMPY => "\tFMPY\t"
162 :     | I.XMPYU => "\tXMPYU\t"
163 :     in emit oper; eFreg r1; comma(); eFreg r2; comma(); eFreg t
164 :     end
165 :    
166 :     fun funary(fu, f, t) = (emit fu; eFreg f; comma(); eFreg t)
167 :     in
168 :     case instr
169 :     of I.STORE{st=I.STW, b, d, r, mem} => store("\tSTW\t", b, d, r, mem)
170 :     | I.STORE{st=I.STH, b, d, r, mem} => store("\tSTH\t", b, d, r, mem)
171 :     | I.STORE{st=I.STB, b, d, r, mem} => store("\tSTB\t", b, d, r, mem)
172 :    
173 :     | I.LOAD{l=I.LDWX, r1, r2, t, mem}=> loadx("\tLDWX\t", r1, r2, t, mem)
174 :     | I.LOAD{l=I.LDHX, r1, r2, t, mem}=> loadx("\tLDHX\t", r1, r2, t, mem)
175 :     | I.LOAD{l=I.LDBX, r1, r2, t, mem}=> loadx("\tLDBX\t", r1, r2, t, mem)
176 :     | I.ARITH{a=I.ADD, r1, r2, t} => arith("\tADD\t", r1, r2, t)
177 :     | I.ARITH{a=I.ADDO, r1, r2, t} => arith("\tADDO\t", r1, r2, t)
178 :     | I.ARITH{a=I.SH1ADD, r1, r2, t} => arith("\tSH1ADD\t", r1, r2, t)
179 :     | I.ARITH{a=I.SH1ADDO, r1, r2, t} => arith("\tSH1ADDO\t", r1, r2, t)
180 :     | I.ARITH{a=I.SUB, r1, r2, t} => arith("\tSUB\t", r1, r2, t)
181 :     | I.ARITH{a=I.SUBO, r1, r2, t} => arith("\tSUBO\t", r1, r2, t)
182 :     | I.ARITH{a=I.OR, r1, r2, t} => arith("\tOR\t", r1, r2, t)
183 :     | I.ARITH{a=I.XOR, r1, r2, t} => arith("\tXOR\t", r1, r2, t)
184 :     | I.ARITH{a=I.AND, r1, r2, t} => arith("\tAND\t", r1, r2, t)
185 :    
186 :     | I.LOADI{li=I.LDB, i, r, t, mem} => loadi("\tLDB\t", i, r, t, mem)
187 :     | I.LOADI{li=I.LDH, i, r, t,mem} => loadi("\tLDH\t", i, r, t, mem)
188 :     | I.LOADI{li=I.LDW, i, r, t, mem} => loadi("\tLDW\t", i, r, t, mem)
189 :     | I.ARITHI{ai=I.ADDI, i, r, t} => arithi("\tADDI\t", i, r, t)
190 :     | I.ARITHI{ai=I.ADDIO, i, r, t} => arithi("\tADDIO\t", i, r, t)
191 :     | I.ARITHI{ai=I.ADDIL, i, r, t} => arithi("\tADDIL\t", i, r, t)
192 :     | I.ARITHI{ai=I.SUBI, i, r, t} => arithi("\tSUBI\t", i, r, t)
193 :     | I.ARITHI{ai=I.SUBIO, i, r, t} => arithi("\tSUBIO\t", i, r, t)
194 :    
195 :     | I.COMCLR arg => cmp arg
196 :    
197 :     | I.SHIFTV{sv=I.VEXTRU, r, len, t}=> shiftv("\tVEXTRU\t", r, len, t)
198 :     | I.SHIFTV{sv=I.VEXTRS, r, len, t}=> shiftv("\tVEXTRS\t", r, len, t)
199 :     | I.SHIFTV{sv=I.ZVDEP, r, len, t} => shiftv("\tZVDEP\t", r, len, t)
200 :    
201 :     | I.SHIFT{s=I.EXTRU, r, p, len, t}=> shift("\tEXTRU\t", r, p, len, t)
202 :     | I.SHIFT{s=I.EXTRS, r, p, len, t}=> shift("\tEXTRS\t", r, p, len, t)
203 :     | I.SHIFT{s=I.ZDEP, r, p, len, t} => shift("\tZDEP\t", r, p, len, t)
204 :    
205 :     | I.BCOND arg => bcond arg
206 :     | I.BCONDI arg => bcondi arg
207 :     | I.B{lab,n} => (emit "\tB"; nullify n;
208 :     emit "\t"; eLabel lab;
209 :     emit "\n\tNOP" )
210 :     | I.FBRANCH{cc,f1,f2,t,n,...} =>
211 :     (emit ("\tFCMP," ^ fcond cc ^"\t"); eFreg f1; comma(); eFreg f2;
212 :     emit "\n\tFTEST\n";
213 :     emit "\tB"; nullify n; emit "\t"; eLabel t; emit "\n\tNOP")
214 :     | I.BLE{d, sr, b, t, ...} =>
215 :     (emit "\tBLE\t"; eOperand d;
216 :     paren(fn () => (emit(ms sr); comma(); eReg b));
217 :     emit "\n\tCOPY %r31,"; eReg t)
218 :     | I.BL{x=I.LabExp(LE.LABEL lab, fs), t, n, ...} =>
219 :     (emit "\tBL"; nullify n;
220 :     emit "\t"; emitFieldSel fs; eLabel lab; comma(); eReg t;
221 :     emit "\n\tNOP" )
222 :     | I.BL _ => error "emitInstr:bl"
223 :     | I.BV{x, b, n, ...} =>
224 :     (emit "\tBV"; nullify n; emit "\t"; eReg x; paren(fn () => eReg b);
225 :     emit "\n\tNOP" )
226 :     | I.BLR{x, t, n, labs, ...} =>
227 :     (emit "\tBLR"; nullify n; emit "\t"; eReg x; comma(); eReg t;
228 :     emit "\n\tNOP\n";
229 :     app (fn l => (emit "\tB,n\t"; eLabel l; emit "\n\tNOP\n")) labs
230 :     )
231 :     | I.LDIL{i, t} => (emit "\tLDIL\t"; eOperand i; comma(); eReg t)
232 :     | I.LDO{i,b,t} =>
233 :     (emit "\tLDO\t"; eOperand i; paren(fn () => eReg b);
234 :     comma(); eReg t)
235 :     | I.MTCTL{r,t} => (emit "\tMTCTL\t"; eReg r; emitCreg t)
236 :     | I.FSTORE{fst, b, d, r, mem} =>
237 :     (case fst
238 :     of I.FSTDS => fstore("\tFSTDS\t", b, d, r, mem)
239 :     | I.FSTWS => fstore("\tFSTWS\t", b, d, r, mem)
240 :     (*esac*))
241 :     | I.FSTOREX{fstx, b, x, r, mem} =>
242 :     (case fstx
243 :     of I.FSTDX => fstorex("\tFSTDX\t", b, x, r, mem)
244 :     | I.FSTWX => fstorex("\tFSTWX\t", b, x, r, mem)
245 :     (*esac*))
246 :     | I.FLOAD{fl=I.FLDDS, b, d, t, mem} => fload("\tFLDDS\t", b, d, t, mem)
247 :     | I.FLOAD{fl=I.FLDWS, b, d, t, mem} => fload("\tFLDWS\t", b, d, t, mem)
248 :     | I.FLOADX{flx=I.FLDDX, b, x, t, mem} => floadx("\tFLDDX\t", b, x, t, mem)
249 :     | I.FLOADX{flx=I.FLDWX, b, x, t, mem} => floadx("\tFLDWX\t", b, x, t, mem)
250 :     | I.FARITH arg => farith arg
251 :     | I.FUNARY{fu=I.FCPY, f, t} => funary("\tFCPY\t", f, t)
252 :     | I.FUNARY{fu=I.FABS, f, t} => funary("\tFABS\t", f, t)
253 :     | I.FUNARY{fu=I.FCNVXF, f, t} => funary("\tFCNVXF\t", f, t)
254 :     | I.BREAK(i, j) => emit ("\tBREAK(" ^ ms i ^ ", " ^ ms j ^ ")")
255 :     | I.NOP => emit "\tNOP"
256 :     | I.COPY{dst, src, tmp, ...} =>
257 :     app (fn I => (emit "\t"; emitInstr(I, regmap)))
258 :     (Shuffle.shuffle {regMap=rmap, temp=tmp, dst=dst, src=src})
259 :     | I.FCOPY{dst, src, tmp, ...} =>
260 :     app (fn I => (emit "\t"; emitInstr(I, regmap)))
261 :     (Shuffle.shufflefp {regMap=rmap, temp=tmp, dst=dst, src=src})
262 :     (*esac*);
263 :     emit "\n"
264 :     end
265 :     end
266 :    
267 :    
268 :     (*
269 :     * $Log: hppaAsm.sml,v $
270 :     * Revision 1.6 1998/10/06 14:04:27 george
271 :     * The instruction sequence FCMP, FTEST, FBCC is being replaced
272 :     * by the composite instruction FBRANCH. This makes scheduling and
273 :     * other tasks easier. Also, added BLR and BL in the instruction set.
274 :     * [leunga]
275 :     *
276 :     * Revision 1.5 1998/09/30 19:35:22 dbm
277 :     * fixing sharing/defspec conflict
278 :     *
279 :     * Revision 1.4 1998/07/25 03:08:15 george
280 :     * added to support block names in MLRISC
281 :     *
282 :     * Revision 1.3 1998/05/25 15:10:53 george
283 :     * Fixed RCS keywords
284 :     *
285 :     *)

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