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[smlnj] Diff of /sml/branches/SMLNJ/src/MLRISC/mlrisc/insnProps.sig
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Diff of /sml/branches/SMLNJ/src/MLRISC/mlrisc/insnProps.sig

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revision 105, Thu May 28 21:30:17 1998 UTC revision 106, Thu May 28 21:30:17 1998 UTC
# Line 9  Line 9 
9    
10     sharing I.C = C     sharing I.C = C
11    
12       exception NegateConditional
13    
14     datatype kind = IK_JUMP | IK_NOP | IK_INSTR     datatype kind = IK_JUMP | IK_NOP | IK_INSTR
15     datatype target = LABELLED of Label.label | FALLTHROUGH | ESCAPES     datatype target = LABELLED of Label.label | FALLTHROUGH | ESCAPES
16    
17       (*========================================================================
18        *  Instruction Kinds
19        *========================================================================*)
20     val instrKind     : I.instruction -> kind     val instrKind     : I.instruction -> kind
21        (* kind of instruction  *)        (* kind of instruction  *)
22    
# Line 19  Line 24 
24        (* is the instruction a move? Assumed to have exactly one        (* is the instruction a move? Assumed to have exactly one
25         * source and one destination         * source and one destination
26         *)         *)
27       val nop           : unit -> I.instruction
28          (* generate a nop *)
29    
30       (*========================================================================
31        *  Parallel Move
32        *========================================================================*)
33     val moveTmpR : I.instruction -> int option     val moveTmpR : I.instruction -> int option
34        (* temporary register associated with parallel move        (* temporary register associated with parallel move
35         * instructions if any.         * instructions if any.
# Line 28  Line 38 
38     val moveDstSrc : I.instruction -> int list * int list     val moveDstSrc : I.instruction -> int list * int list
39        (* source and destinations associated with a parallel move *)        (* source and destinations associated with a parallel move *)
40    
41       val copy : { src : int list, dst : int list } -> I.instruction
42          (* create a parallel move *)
43    
44       val fcopy : { src : int list, dst : int list } -> I.instruction
45          (* create a floating point parallel move *)
46    
47       val splitCopies:{regmap:int->int, insns:I.instruction list} -> I.instruction list
48          (* split all parallel moves in the instruction stream into individual moves *)
49    
50       (*========================================================================
51        *  Branches and Calls/Returns
52        *========================================================================*)
53     val branchTargets : I.instruction -> target list     val branchTargets : I.instruction -> target list
54        (* targets of an instruction. The instruction kind must be IK_JUMP *)        (* targets of an instruction. The instruction kind must be IK_JUMP *)
55    
56     val defUseR       : I.instruction -> int list * int list     val jump : Label.label -> I.instruction
57        (* general purpose registers def/use *)        (* create a jump instruction *)
58    
59     val defUseF       : I.instruction -> int list * int list     val setTargets : I.instruction * Label.label list -> I.instruction
60        (* floating point register def/use *)        (* set the targets of a branch/jump instruction.
61           * do nothing if the instruction is not a branch/jump instruction
62           *)
63    
64     val nop           : unit -> I.instruction     val negateConditional : I.instruction -> I.instruction
65        (* generate a nop *)        (* negate a conditional branch.
66           * raise NegateConditional if the instruction is not a conditional
67           * or if it cannot be negated.
68           *)
69    
70       (*========================================================================
71        *  Definition and use (for register allocation mainly)
72        *========================================================================*)
73       val defUse : C.cellclass -> I.instruction -> (int list * int list)
74          (* def/use lists *)
75  end  end
76    
77    
78    
79  (*  (*
80   * $Log: insnProps.sig,v $   * $Log: insnProps.sig,v $
81     * Revision 1.2  1998/05/19 15:48:00  george
82     *   Added a whole bunch of functions to support global scheduling.
83     *
84   * Revision 1.1.1.1  1998/04/08 18:39:02  george   * Revision 1.1.1.1  1998/04/08 18:39:02  george
85   * Version 110.5   * Version 110.5
86   *   *

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