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[smlnj] Diff of /sml/branches/SMLNJ/src/MLRISC/sparc/sparcDelaySlotProps.sml
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Diff of /sml/branches/SMLNJ/src/MLRISC/sparc/sparcDelaySlotProps.sml

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revision 130, Mon Sep 7 19:39:22 1998 UTC revision 167, Sat Nov 7 20:11:41 1998 UTC
# Line 1  Line 1 
1  functor SparcDelaySlotProps  functor SparcDelaySlotProps
2     (structure I : SPARCINSTR     (structure I : SPARCINSTR
3      structure P : INSN_PROPERTIES      structure P : INSN_PROPERTIES where I = I
4         sharing P.I = I) : DELAY_SLOT_PROPERTIES =      (* sharing/defn conflict:   sharing P.I = I*)
5       ) : DELAY_SLOT_PROPERTIES =
6  struct  struct
7     structure I  = I     structure I  = I
8     structure SL = SortedList     structure SL = SortedList
# Line 21  Line 22 
22       | I.Bicc{b=I.BA,a,nop,...} => {n=false,nOn=D_NONE,nOff=D_ALWAYS,nop=nop}       | I.Bicc{b=I.BA,a,nop,...} => {n=false,nOn=D_NONE,nOff=D_ALWAYS,nop=nop}
23       | I.Bicc{a,nop,...} => {n=a,nOn=D_TAKEN,nOff=D_ALWAYS,nop=nop}       | I.Bicc{a,nop,...} => {n=a,nOn=D_TAKEN,nOff=D_ALWAYS,nop=nop}
24       | I.FBfcc{a,nop,...} => {n=a,nOn=D_TAKEN,nOff=D_ALWAYS,nop=nop}       | I.FBfcc{a,nop,...} => {n=a,nOn=D_TAKEN,nOff=D_ALWAYS,nop=nop}
25         | I.FCMP{nop,...} => {n=false,nOn=D_ERROR,nOff=D_ALWAYS,nop=nop}
26       | _ => {n=false,nOn=D_ERROR,nOff=D_NONE,nop=false}       | _ => {n=false,nOn=D_ERROR,nOff=D_NONE,nop=false}
27    
28     fun enableDelaySlot{instr, n, nop} =     fun enableDelaySlot{instr, n, nop} =
# Line 34  Line 36 
36         | (I.RET{leaf,...},false) => I.RET{leaf=leaf,nop=nop}         | (I.RET{leaf,...},false) => I.RET{leaf=leaf,nop=nop}
37         | (I.Bicc{b,a,label,...},_) => I.Bicc{b=b,a=n,nop=nop,label=label}         | (I.Bicc{b,a,label,...},_) => I.Bicc{b=b,a=n,nop=nop,label=label}
38         | (I.FBfcc{b,a,label,...},_) => I.FBfcc{b=b,a=n,nop=nop,label=label}         | (I.FBfcc{b,a,label,...},_) => I.FBfcc{b=b,a=n,nop=nop,label=label}
39           | (I.FCMP{cmp,r1,r2,...},false) => I.FCMP{cmp=cmp,r1=r1,r2=r2,nop=nop}
40         | _ => error "enableDelaySlot"         | _ => error "enableDelaySlot"
41    
42      (* %y   = 64      (* %y   = 64
43       * %psr = 65       * %psr = 65
44       * %fsr = 66       * %fsr = 66
45       *)       *)
46    
47        val defUseI = P.defUse I.C.GP
48        val defUseF = P.defUse I.C.FP
49      fun conflict{regmap,src=i,dst=j} =      fun conflict{regmap,src=i,dst=j} =
50          let fun defUseOther(I.Ticc _) = ([],[65])          let fun defUseOther(I.Ticc _) = ([],[65])
51                | defUseOther(I.ARITH{cc=true,...}) = ([65],[])                | defUseOther(I.ARITH{cc=true,...}) = ([65],[])
# Line 53  Line 59 
59              fun clash(defUse) =              fun clash(defUse) =
60                  let val (di,ui) = defUse i                  let val (di,ui) = defUse i
61                      val (dj,uj) = defUse j                      val (dj,uj) = defUse j
                     val di = map regmap di  
                     val ui = map regmap ui  
                     val dj = map regmap dj  
                     val uj = map regmap uj  
62                  in  case SL.intersect(di,uj) of                  in  case SL.intersect(di,uj) of
63                         [] => (case SL.intersect(di,dj) of                         [] => (case SL.intersect(di,dj) of
64                                  [] => (case SL.intersect(ui,dj) of                                  [] => (case SL.intersect(ui,dj) of
# Line 65  Line 67 
67                                | _ => true)                                | _ => true)
68                      |  _ => true                      |  _ => true
69                  end                  end
70          in  clash(P.defUse I.C.GP) orelse              fun defUseInt i =
71              clash(P.defUse I.C.FP) orelse                  let val (d,u) = defUseI i
72                        val d     = SL.uniq(map regmap d)
73                        val u     = SL.uniq(map regmap u)
74                        (* no dependence on register 0! *)
75                        fun elim0(0::l) = l
76                          | elim0 l     = l
77                    in  (elim0 d, elim0 u) end
78                fun defUseReal i =
79                    let val (d,u) = defUseF i
80                        val d     = SL.uniq(map regmap d)
81                        val u     = SL.uniq(map regmap u)
82                    in  (d,u) end
83            in  clash(defUseInt) orelse
84                clash(defUseReal) orelse
85              clash(defUseOther)              clash(defUseOther)
86          end          end
87    
88      fun delaySlotCandidate(I.CALL _ | I.Bicc _ | I.FBfcc _ | I.Ticc _      fun delaySlotCandidate{jmp,delaySlot=
89                           | I.JMP _ | I.JMPL _ | I.RET _) = false                           (I.CALL _ | I.Bicc _ | I.FBfcc _ | I.Ticc _
90                             | I.JMP _ | I.JMPL _ | I.RET _)} = false
91          | delaySlotCandidate{jmp=I.FCMP _,delaySlot=I.FCMP _} = false
92        | delaySlotCandidate _ = true        | delaySlotCandidate _ = true
93    
94     fun setTarget(I.Bicc{b,a,nop,...},lab) = I.Bicc{b=b,a=a,nop=nop,label=lab}     fun setTarget(I.Bicc{b,a,nop,...},lab) = I.Bicc{b=b,a=a,nop=nop,label=lab}
# Line 79  Line 96 
96       | setTarget _ = error "setTarget"       | setTarget _ = error "setTarget"
97    
98  end  end
   
 (*  
  * $Log$  
  *)  

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