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[smlnj] Annotation of /sml/branches/SMLNJ/src/runtime/include/ml-roots.h
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Annotation of /sml/branches/SMLNJ/src/runtime/include/ml-roots.h

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1 : monnier 249 /* ml-roots.h
2 :     *
3 :     * COPYRIGHT (c) 1995 by AT&T Bell Laboratories.
4 :     *
5 :     * The root register indices for various machines.
6 :     *
7 :     * NROOTS gives the size of the variable-size portion (roots[]) of the
8 :     * ML state vector. Note that the name "roots" is slightly misleading;
9 :     * while every entry in the vector must be saved over calls to C, not
10 :     * every entry is a valid root on every entry to C. The valididity of
11 :     * most entries is indicated using the register map convention (via
12 :     * ArgRegMap); these entries are valid (and live) iff the corresponding
13 :     * bit in the register mask is set (see cps/generic.sml). N_ARG_REGS
14 :     * gives the number of such entries. The pc, exncont, varptr, and baseptr
15 :     * (if defined) are always valid roots, and the icounter (if defined) never is.
16 :     */
17 :    
18 :     #ifndef _ML_ROOTS_
19 :     #define _ML_ROOTS_
20 :    
21 :     #if defined(TARGET_ALPHA32)
22 :     # define NROOTS 22 /* $0-$4, pc, $6-$8, $10, $14, $16-26 */
23 :     # define N_ARG_REGS 18
24 :     # define N_PSEUDO_REGS 2
25 :     # define ARG_INDX 0 /* $0 */
26 :     # define CONT_INDX 1 /* $1 */
27 :     # define CLOSURE_INDX 2 /* $2 */
28 :     # define LINK_INDX 3 /* $3 */
29 :     # define PC_INDX 4
30 :     # define MISC0_INDX 5 /* $6 */
31 :     # define MISC1_INDX 6 /* $7 */
32 :     # define MISC2_INDX 7 /* $8 */
33 :     # define MISC3_INDX 8 /* $15 */
34 :     # define MISC4_INDX 9 /* $16 */
35 :     # define MISC5_INDX 10 /* $17 */
36 :     # define MISC6_INDX 11 /* $18 */
37 :     # define MISC7_INDX 12 /* $19 */
38 :     # define MISC8_INDX 13 /* $20 */
39 :     # define MISC9_INDX 14 /* $20 */
40 :     # define MISC10_INDX 15 /* $20 */
41 :     # define MISC11_INDX 16 /* $20 */
42 :     # define MISC12_INDX 17 /* $20 */
43 :     # define MISC13_INDX 18 /* $20 */
44 :     # define VAR_INDX 19 /* $10 */
45 :     # define EXN_INDX 20 /* $14 */
46 :     # define BASE_INDX 21 /* $4 */
47 :    
48 :     #elif defined(TARGET_HPPA)
49 :     # define NROOTS 24
50 :     # define N_PSEUDO_REGS 2
51 :     # define N_ARG_REGS 20 /* 4 std. regs & 16 miscregs */
52 :     # define PC_INDX 0
53 :     # define LINK_INDX 1
54 :     # define CLOSURE_INDX 2
55 :     # define ARG_INDX 3
56 :     # define CONT_INDX 4
57 :     # define VAR_INDX 5
58 :     # define BASE_INDX 6
59 :     # define EXN_INDX 7
60 :    
61 :     # define MISC0_INDX 8
62 :     # define MISC1_INDX 9
63 :     # define MISC2_INDX 10
64 :     # define MISC3_INDX 11
65 :     # define MISC4_INDX 12
66 :     # define MISC5_INDX 13
67 :     # define MISC6_INDX 14
68 :     # define MISC7_INDX 15
69 :     # define MISC8_INDX 16
70 :     # define MISC9_INDX 17
71 :     # define MISC10_INDX 18
72 :     # define MISC11_INDX 19
73 :     # define MISC12_INDX 20
74 :     # define MISC13_INDX 21
75 :     # define MISC14_INDX 22
76 :     # define MISC15_INDX 23
77 :    
78 :     #elif defined (TARGET_M68)
79 :    
80 :     # define NROOTS 8 /* d7, a0-a4, d3, pc */
81 :     # define N_ARG_REGS 5
82 :     # define PC_INDX 7
83 :     # define EXN_INDX 0 /* d7 */
84 :     # define ARG_INDX 1 /* a0 */
85 :     # define CONT_INDX 2 /* a1 */
86 :     # define CLOSURE_INDX 3 /* a2 */
87 :     # define VAR_INDX 6 /* d3 */
88 :     # define LINK_INDX 4
89 :    
90 :     #elif defined(TARGET_MIPS)
91 :    
92 :     # define NROOTS 21 /* $2-$4, $30, pc, $5-$18, $20, $24 */
93 :     # define N_ARG_REGS 17
94 :     # define N_PSEUDO_REGS 2
95 :     # define PC_INDX 4
96 :     # define EXN_INDX 3 /* $30 */
97 :     # define ARG_INDX 0 /* $2 */
98 :     # define CONT_INDX 1 /* $3 */
99 :     # define CLOSURE_INDX 2 /* $4 */
100 :     # define VAR_INDX 19 /* $20 */
101 :     # define BASE_INDX 20 /* $24 */
102 :     # define LINK_INDX 5 /* $5 */
103 :     # define MISC0_INDX 6 /* $6 */
104 :     # define MISC1_INDX 7 /* $7 */
105 :     # define MISC2_INDX 8 /* $8 */
106 :     # define MISC3_INDX 9 /* $9 */
107 :     # define MISC4_INDX 10 /* $10 */
108 :     # define MISC5_INDX 11 /* $11 */
109 :     # define MISC6_INDX 12 /* $12 */
110 :     # define MISC7_INDX 13 /* $13 */
111 :    
112 :     #elif (defined(TARGET_PPC) || defined(TARGET_RS6000))
113 :     # define NROOTS 24
114 :     # define N_ARG_REGS 19
115 :     # define N_PSEUDO_REGS 2
116 :    
117 :     # define LINK_INDX 0
118 :     # define CLOSURE_INDX 1
119 :     # define ARG_INDX 2
120 :     # define CONT_INDX 3
121 :     # define EXN_INDX 4
122 :     # define VAR_INDX 5
123 :     # define BASE_INDX 6
124 :     # define PC_INDX 8
125 :    
126 :     # define MISC0_INDX 9 /* 24 */
127 :     # define MISC1_INDX 10 /* 25 */
128 :     # define MISC2_INDX 11 /* 26 */
129 :     # define MISC3_INDX 12 /* 27 */
130 :     # define MISC4_INDX 13 /* 3 */
131 :     # define MISC5_INDX 14 /* 4 */
132 :     # define MISC6_INDX 15 /* 5 */
133 :     # define MISC7_INDX 16 /* 6 */
134 :     # define MISC8_INDX 17 /* 7 */
135 :     # define MISC9_INDX 18 /* 8 */
136 :     # define MISC10_INDX 19 /* 9 */
137 :     # define MISC11_INDX 20 /* 10 */
138 :     # define MISC12_INDX 21 /* 11 */
139 :     # define MISC13_INDX 22 /* 12 */
140 :     # define MISC14_INDX 23 /* 13 */
141 :    
142 :    
143 :     #elif defined(TARGET_SPARC)
144 :    
145 :     # define NROOTS 23 /* pc, %i0-i5, %g7, %g1-%g3, %l0-%l7, %o0-%o1 %o3-%o4 */
146 :     # define N_ARG_REGS 19 /* exclude baseptr */
147 :     # define N_PSEUDO_REGS 2
148 :     # define PC_INDX 6
149 :     # define EXN_INDX 7 /* %g7 */
150 :     # define ARG_INDX 0 /* %i0 */
151 :     # define CONT_INDX 1 /* %i1 */
152 :     # define CLOSURE_INDX 2 /* %i2 */
153 :     # define BASE_INDX 3 /* %i3 */
154 :     # define VAR_INDX 5 /* %i5 */
155 :     # define LINK_INDX 4 /* %g1 */
156 :     # define MISC0_INDX 8 /* %g2 */
157 :     # define MISC1_INDX 9 /* %g3 */
158 :     # define MISC2_INDX 10 /* %o0 */
159 :     # define MISC3_INDX 11 /* %o1 */
160 :     # define MISC4_INDX 12 /* %l0 */
161 :     # define MISC5_INDX 13 /* %l1 */
162 :     # define MISC6_INDX 14 /* %l2 */
163 :     # define MISC7_INDX 15 /* %l3 */
164 :     # define MISC8_INDX 16 /* %l4 */
165 :     # define MISC9_INDX 17 /* %l5 */
166 :     # define MISC10_INDX 18 /* %l6 */
167 :     # define MISC11_INDX 19 /* %l7 */
168 :     # define MISC12_INDX 20 /* %i4 */
169 :     # define MISC13_INDX 21 /* %o3 */
170 :     # define MISC14_INDX 22 /* %o4 */
171 :    
172 :     #elif defined (TARGET_X86)
173 :    
174 :     # define NROOTS 26
175 :     # define N_ARG_REGS 23
176 :     # define N_PSEUDO_REGS 2
177 :     # define EXN_INDX 0 /* 8(esp) */
178 :     # define ARG_INDX 1 /* ebp */
179 :     # define CONT_INDX 2 /* esi */
180 :     # define CLOSURE_INDX 3 /* 16(esp) */
181 :     # define VAR_INDX 4 /* 28(esp) */
182 :     # define LINK_INDX 5 /* 20(esp) */
183 :     # define PC_INDX 6 /* eip */
184 :     # define MISC0_INDX 7 /* ebx */
185 :     # define MISC1_INDX 8 /* ecx */
186 :     # define MISC2_INDX 9 /* edx */
187 :     /* MISCn, where n > 2, is a virtual register */
188 :     # define MISC3_INDX 10 /* 40(esp) */
189 :     # define MISC4_INDX 11 /* 44(esp) */
190 :     # define MISC5_INDX 12 /* 48(esp) */
191 :     # define MISC6_INDX 13 /* 52(esp) */
192 :     # define MISC7_INDX 14 /* 56(esp) */
193 :     # define MISC8_INDX 15 /* 60(esp) */
194 :     # define MISC9_INDX 16 /* 64(esp) */
195 :     # define MISC10_INDX 17 /* 68(esp) */
196 :     # define MISC11_INDX 18 /* 72(esp) */
197 :     # define MISC12_INDX 19 /* 76(esp) */
198 :     # define MISC13_INDX 20 /* 80(esp) */
199 :     # define MISC14_INDX 21 /* 84(esp) */
200 :     # define MISC15_INDX 22 /* 88(esp) */
201 :     # define MISC16_INDX 23 /* 92(esp) */
202 :     # define MISC17_INDX 24 /* 96(esp) */
203 :     # define MISC18_INDX 25 /* 100(esp) */
204 :    
205 :     #elif defined (TARGET_BYTECODE)
206 :    
207 :     # define NROOTS 18 /* GPR[0-14], PC, exnPtr, varPtr */
208 :     # define N_ARG_REGS 15 /* GPR[0-14] */
209 :     # define PC_INDX 15
210 :     # define EXN_INDX 16 /* exnPtr */
211 :     # define ARG_INDX 0 /* GPR[0] */
212 :     # define CONT_INDX 1 /* GPR[1] */
213 :     # define CLOSURE_INDX 2 /* GPR[2] */
214 :     # define LINK_INDX 3 /* GPR[3] */
215 :     # define VAR_INDX 17 /* varPtr */
216 :    
217 :     #endif
218 :    
219 :     #endif /* !_ML_ROOTS_ */
220 :    

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