Home My Page Projects Code Snippets Project Openings SML/NJ
Summary Activity Forums Tracker Lists Tasks Docs Surveys News SCM Files

SCM Repository

[smlnj] Log of /sml/trunk/src/MLRISC/Tools/MDL/mdl-gen-asm.sml
[smlnj] / sml / trunk / src / MLRISC / Tools / MDL / mdl-gen-asm.sml  
ViewVC logotype

Log of /sml/trunk/src/MLRISC/Tools/MDL/mdl-gen-asm.sml

Parent Directory Parent Directory

Sticky Revision:
(Current path doesn't exist after revision 2125)

Revision 1116 - (view) (download) (annotate) - [select for diffs]
Modified Tue Mar 5 23:17:18 2002 UTC (18 years, 9 months ago) by george
File length: 12008 byte(s)
Diff to previous 1108
In order to support the block placement optimization, the first
cluster that is generated (called the linkage cluster) contains a jump
to the entry point for the compilation unit. The linkage cluster
contains only one 'function', so block placement will have no effect on
the linkage cluster itself, but all the other clusters have full
freedom in the manner in which they reorder blocks or functions.

On the x86 the typical linkage code that is generated is:
	.align 2
        addl    $L1-L0, 72(%esp)
        jmp     L0

        .align  2

72(%esp) is the memory location for the stdlink register. This
must contain the address of the CPS function being called. In the
above example, it contains the address of  L0; before
calling L1 (the real entry point for the compilation unit), it
must contain the address for L1, and hence

	addl $L1-L0, 72(%esp)

I have tested this on all architectures except the hppa.The increase
in code size is of course negligible.

Revision 1108 - (view) (download) (annotate) - [select for diffs]
Modified Fri Mar 1 04:46:54 2002 UTC (18 years, 9 months ago) by george
File length: 12008 byte(s)
Diff to previous 1017
  removed extra blank line when printing annotations in assembly code

Revision 1017 - (view) (download) (annotate) - [select for diffs]
Modified Wed Jan 16 14:48:16 2002 UTC (18 years, 10 months ago) by george
File length: 12013 byte(s)
Diff to previous 1009
  fixed various bugs with emitting pseudo-ops

Revision 1009 - (view) (download) (annotate) - [select for diffs]
Modified Wed Jan 9 19:44:22 2002 UTC (18 years, 10 months ago) by george
File length: 12014 byte(s)
Diff to previous 1003
	Removed the native COPY and FCOPY instructions
	from all the architectures and replaced it with the
	explicit COPY instruction from the previous commit.

	It is now possible to simplify many of the optimizations
	modules that manipulate copies. This has not been
	done in this change.

Revision 1003 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 7 02:45:32 2001 UTC (19 years ago) by george
File length: 11722 byte(s)
Diff to previous 984
Changed the representation of instructions from being fully abstract
to being partially concrete. That is to say:

	type instruction

	type instr				(* machine instruction *)

	datatype instruction =
	    LIVE of {regs: C.cellset, spilled: C.cellset}
          | KILL of {regs: C.cellset, spilled: C.cellset}
          | COPYXXX of {k: CB.cellkind, dst: CB.cell list, src: CB.cell list}
          | ANNOTATION of {i: instruction, a: Annotations.annotation}
          | INSTR of instr

This makes the handling of certain special instructions that appear on
all architectures easier and uniform.

LIVE and KILL say that a list of registers are live or killed at the
program point where they appear. No spill code is generated when an
element of the 'regs' field is spilled, but the register is moved to
the 'spilled' (which is present, more for debugging than anything else).

LIVE replaces the (now deprecated) DEFFREG instruction on the alpha.
We used to generate:

	f1 := f2 + f3

but now generate:

	f1 := f2 + f3
	LIVE {regs=[f1,f2,f3], spilled=[]}

Furthermore, the DEFFREG (hack) required that all floating point instruction
use all registers mentioned in the instruction. Therefore f1 := f2 + f3,
defines f1 and uses [f1,f2,f3]! This hack is no longer required resulting
in a cleaner alpha implementation. (Hopefully, intel will not get rid of
this architecture).

COPYXXX is intended to replace the parallel COPY and FCOPY  available on
all the architectures. This will result in further simplification of the
register allocator that must be aware of them for coalescing purposes, and
will also simplify certain aspects of the machine description that provides
callbacks related to parallel copies.

ANNOTATION should be obvious, and now INSTR represents the honest to God
machine instruction set!

The <arch>/instructions/<arch>Instr.sml files define certain utility
functions for making porting easier -- essentially converting upper case
to lower case. All machine instructions (of type instr) are in upper case,
and the lower case form generates an MLRISC instruction. For example on
the alpha we have:

  datatype instr =
     LDA of {r:cell, b:cell, d:operand}
   | ...

  val lda : {r:cell, b:cell, d:operand} -> instruction

where lda is just (INSTR o LDA), etc.

Revision 984 - (view) (download) (annotate) - [select for diffs]
Modified Wed Nov 21 19:00:08 2001 UTC (19 years ago) by george
File length: 11060 byte(s)
Diff to previous 951
  Implemented a complete redesign of MLRISC pseudo-ops. Now there
  ought to never be any question of incompatabilities with
  pseudo-op syntax expected by host assemblers.

  For now, only modules supporting GAS syntax are implemented
  but more should follow, such as MASM, and vendor assembler
  syntax, e.g. IBM as, Sun as, etc.

Revision 951 - (view) (download) (annotate) - [select for diffs]
Modified Tue Oct 9 13:54:40 2001 UTC (19 years, 1 month ago) by george
File length: 10941 byte(s)
Diff to previous 909
Updated input to PERL scripts used to generate
MLRISC cm files.

Revision 909 - (view) (download) (annotate) - [select for diffs]
Modified Fri Aug 24 17:48:53 2001 UTC (19 years, 3 months ago) by george
File length: 10873 byte(s)
Diff to previous 900
removed clusters from MLRISC

Revision 900 - (view) (download) (annotate) - [select for diffs]
Modified Tue Aug 14 15:10:12 2001 UTC (19 years, 3 months ago) by jhr
File length: 10822 byte(s)
Diff to previous 889
  Moved CellSets from Cells to CellsBasis.

Revision 889 - (view) (download) (annotate) - [select for diffs]
Modified Thu Jul 19 20:35:20 2001 UTC (19 years, 4 months ago) by george
File length: 10813 byte(s)
Diff to previous 815
Substantial simplification in the CELLS interface

Revision 815 - (view) (download) (annotate) - [select for diffs]
Modified Fri May 4 05:09:10 2001 UTC (19 years, 7 months ago) by leunga
File length: 10804 byte(s)
Diff to previous 797

    Moby related MLRISC changes

Revision 797 - (view) (download) (annotate) - [select for diffs]
Modified Fri Mar 16 00:00:17 2001 UTC (19 years, 8 months ago) by leunga
File length: 10682 byte(s)
Diff to previous 796

   x86 optimizations for x := x op y where x is a memory location.

Revision 796 - (view) (download) (annotate) - [select for diffs]
Modified Tue Mar 6 00:04:33 2001 UTC (19 years, 9 months ago) by leunga
File length: 10561 byte(s)
Diff to previous 775

   Support for alternative control-flow, exception handlers added.

Revision 775 - (view) (download) (annotate) - [select for diffs]
Modified Fri Jan 12 01:17:51 2001 UTC (19 years, 10 months ago) by leunga
File length: 10347 byte(s)
Diff to previous 744

    Merging the types labexp and mltree.
    tag leunga-20010111-labexp=mltree

Revision 744 - (view) (download) (annotate) - [select for diffs]
Added Fri Dec 8 04:11:42 2000 UTC (20 years ago) by leunga
File length: 10380 byte(s)

   A CVS update record!

   Changed type cell from int to datatype, and numerous other changes.
   Affect every client of MLRISC.  Lal says this can be bootstrapped on all
   machines.  See smlnj/HISTORY for details.

   Tag:  leunga-20001207-cell-monster-hack

This form allows you to request diffs between any two revisions of this file. For each of the two "sides" of the diff, enter a numeric revision.

  Diffs between and
  Type of Diff should be a

Sort log by:

ViewVC Help
Powered by ViewVC 1.0.0