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[smlnj] Log of /sml/trunk/src/MLRISC/alpha/instructions/alphaFreqProps.sml
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Log of /sml/trunk/src/MLRISC/alpha/instructions/alphaFreqProps.sml

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Sticky Revision:
(Current path doesn't exist after revision 2125)

Revision 1125 - (view) (download) (annotate) - [select for diffs]
Modified Thu Mar 7 21:04:13 2002 UTC (17 years, 9 months ago) by jhr
File length: 1361 byte(s)
Diff to previous 1121 , to selected 469
  Changed representation of probabilities and frequencies.

Revision 1121 - (view) (download) (annotate) - [select for diffs]
Modified Wed Mar 6 19:58:56 2002 UTC (17 years, 9 months ago) by blume
File length: 1123 byte(s)
Diff to previous 1003 , to selected 469
fixed downstream problems caused by those Freq type change in MLRISC

Revision 1003 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 7 02:45:32 2001 UTC (18 years ago) by george
File length: 1086 byte(s)
Diff to previous 651 , to selected 469
Changed the representation of instructions from being fully abstract
to being partially concrete. That is to say:

  from
	type instruction

  to
	type instr				(* machine instruction *)

	datatype instruction =
	    LIVE of {regs: C.cellset, spilled: C.cellset}
          | KILL of {regs: C.cellset, spilled: C.cellset}
          | COPYXXX of {k: CB.cellkind, dst: CB.cell list, src: CB.cell list}
          | ANNOTATION of {i: instruction, a: Annotations.annotation}
          | INSTR of instr

This makes the handling of certain special instructions that appear on
all architectures easier and uniform.

LIVE and KILL say that a list of registers are live or killed at the
program point where they appear. No spill code is generated when an
element of the 'regs' field is spilled, but the register is moved to
the 'spilled' (which is present, more for debugging than anything else).

LIVE replaces the (now deprecated) DEFFREG instruction on the alpha.
We used to generate:

	DEFFREG f1
	f1 := f2 + f3
        trapb

but now generate:

	f1 := f2 + f3
	trapb
	LIVE {regs=[f1,f2,f3], spilled=[]}

Furthermore, the DEFFREG (hack) required that all floating point instruction
use all registers mentioned in the instruction. Therefore f1 := f2 + f3,
defines f1 and uses [f1,f2,f3]! This hack is no longer required resulting
in a cleaner alpha implementation. (Hopefully, intel will not get rid of
this architecture).

COPYXXX is intended to replace the parallel COPY and FCOPY  available on
all the architectures. This will result in further simplification of the
register allocator that must be aware of them for coalescing purposes, and
will also simplify certain aspects of the machine description that provides
callbacks related to parallel copies.

ANNOTATION should be obvious, and now INSTR represents the honest to God
machine instruction set!

The <arch>/instructions/<arch>Instr.sml files define certain utility
functions for making porting easier -- essentially converting upper case
to lower case. All machine instructions (of type instr) are in upper case,
and the lower case form generates an MLRISC instruction. For example on
the alpha we have:

  datatype instr =
     LDA of {r:cell, b:cell, d:operand}
   | ...

  val lda : {r:cell, b:cell, d:operand} -> instruction
    ...

where lda is just (INSTR o LDA), etc.

Revision 651 - (view) (download) (annotate) - [select for diffs]
Modified Thu Jun 1 18:34:03 2000 UTC (19 years, 6 months ago) by monnier
File length: 937 byte(s)
Diff to previous 545 , to selected 469
bring revisions from the vendor branch to the trunk

Revision 545 - (view) (download) (annotate) - [select for diffs]
Modified Thu Feb 24 13:56:44 2000 UTC (19 years, 9 months ago) by george
File length: 937 byte(s)
Diff to previous 499 , to selected 469
  Changes to MLTREE

Revision 499 - (view) (download) (annotate) - [select for diffs]
Modified Tue Dec 7 15:44:50 1999 UTC (20 years ago) by monnier
File length: 922 byte(s)
Copied from: sml/branches/SMLNJ/src/MLRISC/alpha/instructions/alphaFreqProps.sml revision 498
Diff to previous 498 , to selected 469
This commit was generated by cvs2svn to compensate for changes in r498,
which included commits to RCS files with non-trunk default branches.

Revision 498 - (view) (download) (annotate) - [select for diffs]
Modified Tue Dec 7 15:44:50 1999 UTC (20 years ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/alpha/instructions/alphaFreqProps.sml
File length: 922 byte(s)
Diff to previous 469
version 110.25

Revision 469 - (view) (download) (annotate) - [selected]
Modified Wed Nov 10 22:42:52 1999 UTC (20 years, 1 month ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/alpha/instructions/alphaFreqProps.sml
File length: 921 byte(s)
Diff to previous 428
version 110.23

Revision 428 - (view) (download) (annotate) - [select for diffs]
Modified Wed Sep 8 09:47:00 1999 UTC (20 years, 3 months ago) by
Original Path: sml/branches/SMLNJ/src/MLRISC/alpha/instructions/alphaFreqProps.sml
File length: 885 byte(s)
Copied from: sml/trunk/src/MLRISC/alpha/instructions/alphaFreqProps.sml revision 427
Diff to previous 427 , to selected 469
This commit was manufactured by cvs2svn to create branch 'SMLNJ'.

Revision 427 - (view) (download) (annotate) - [select for diffs]
Added Wed Sep 8 09:40:08 1999 UTC (20 years, 3 months ago) by monnier
File length: 885 byte(s)
Diff to selected 469
Initial revision

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