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[smlnj] Diff of /sml/trunk/src/MLRISC/alpha/mltree/alpha.sml
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Diff of /sml/trunk/src/MLRISC/alpha/mltree/alpha.sml

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revision 788, Wed Feb 28 04:09:48 2001 UTC revision 909, Fri Aug 24 17:48:53 2001 UTC
# Line 41  Line 41 
41    structure W32 = Word32    structure W32 = Word32
42    structure P   = PseudoInstrs    structure P   = PseudoInstrs
43    structure A   = MLRiscAnnotations    structure A   = MLRiscAnnotations
44      structure CB  = CellsBasis
45      structure CFG = ExtensionComp.CFG
46    
47   (*********************************************************   (*********************************************************
48    
# Line 141  Line 143 
143    
144    fun error msg = MLRiscErrorMsg.error("Alpha",msg)    fun error msg = MLRiscErrorMsg.error("Alpha",msg)
145    
146    type instrStream = (I.instruction,C.cellset) T.stream    type instrStream = (I.instruction, C.cellset, CFG.cfg) T.stream
147    type mltreeStream = (T.stm,T.mlrisc list) T.stream    type mltreeStream = (T.stm, T.mlrisc list, CFG.cfg) T.stream
148    
149    (*    (*
150     * This module is used to simulate operations of non-standard widths.     * This module is used to simulate operations of non-standard widths.
# Line 169  Line 171 
171    functor Multiply32 = MLTreeMult    functor Multiply32 = MLTreeMult
172      (structure I = I      (structure I = I
173       structure T = T       structure T = T
174         structure CB = CellsBasis
175    
176       val intTy = 32       val intTy = 32
177    
178       type arg  = {r1:C.cell,r2:C.cell,d:C.cell}       type arg  = {r1:CB.cell,r2:CB.cell,d:CB.cell}
179       type argi = {r:C.cell,i:int,d:C.cell}       type argi = {r:CB.cell,i:int,d:CB.cell}
180    
181       fun mov{r,d}    = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}       fun mov{r,d}    = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
182       fun add{r1,r2,d} = I.OPERATE{oper=I.ADDL,ra=r1,rb=I.REGop r2,rc=d}       fun add{r1,r2,d} = I.OPERATE{oper=I.ADDL,ra=r1,rb=I.REGop r2,rc=d}
# Line 211  Line 214 
214    functor Multiply64 = MLTreeMult    functor Multiply64 = MLTreeMult
215      (structure I = I      (structure I = I
216       structure T = T       structure T = T
217         structure CB = CellsBasis
218    
219       val intTy = 64       val intTy = 64
220    
221       type arg  = {r1:C.cell,r2:C.cell,d:C.cell}       type arg  = {r1:CB.cell, r2:CB.cell, d:CB.cell}
222       type argi = {r:C.cell,i:int,d:C.cell}       type argi = {r:CB.cell, i:int, d:CB.cell}
223    
224       fun mov{r,d}    = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}       fun mov{r,d}    = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
225       fun add{r1,r2,d}= I.OPERATE{oper=I.ADDQ,ra=r1,rb=I.REGop r2,rc=d}       fun add{r1,r2,d}= I.OPERATE{oper=I.ADDQ,ra=r1,rb=I.REGop r2,rc=d}
# Line 294  Line 298 
298    
299    fun selectInstructions    fun selectInstructions
300          (instrStream as          (instrStream as
301           S.STREAM{emit,beginCluster,endCluster,           S.STREAM{emit,beginCluster,endCluster,getAnnotations,
302                    defineLabel,entryLabel,pseudoOp,annotation,                    defineLabel,entryLabel,pseudoOp,annotation,
303                    exitBlock,comment,...}) =                    exitBlock,comment,...}) =
304    let    let
# Line 413  Line 417 
417                             [_] => NONE | _ => SOME(I.FDirect(newFreg()))},an)                             [_] => NONE | _ => SOME(I.FDirect(newFreg()))},an)
418    
419        and move(s,d,an) =        and move(s,d,an) =
420            if C.sameCell(s,d) orelse C.sameCell(d,zeroR) then () else            if CB.sameCell(s,d) orelse CB.sameCell(d,zeroR) then () else
421            mark(I.COPY{dst=[d],src=[s],impl=ref NONE,tmp=NONE},an)            mark(I.COPY{dst=[d],src=[s],impl=ref NONE,tmp=NONE},an)
422    
423        and fmove(s,d,an) =        and fmove(s,d,an) =
424            if C.sameCell(s,d) orelse C.sameCell(d,zeroFR) then () else            if CB.sameCell(s,d) orelse CB.sameCell(d,zeroFR) then () else
425            mark(I.FCOPY{dst=[d],src=[s],impl=ref NONE,tmp=NONE},an)            mark(I.FCOPY{dst=[d],src=[s],impl=ref NONE,tmp=NONE},an)
426    
427         (* emit an sign extension op *)         (* emit an sign extension op *)
# Line 468  Line 472 
472                I.IMMop(toInt(n))                I.IMMop(toInt(n))
473              else let val tmpR = newReg()              else let val tmpR = newReg()
474                   in  loadImmed(n,zeroR,tmpR,[]); I.REGop tmpR end                   in  loadImmed(n,zeroR,tmpR,[]); I.REGop tmpR end
475          | opn(e as (T.CONST _ | T.LABEL _)) = I.LABop e          | opn(e as T.CONST _) = I.LABop e
476          | opn(T.LABEXP x) = I.LABop x          | opn(T.LABEXP x) = I.LABop x
477          | opn e = I.REGop(expr e)          | opn e = I.REGop(expr e)
478    
# Line 661  Line 665 
665            | SOME 0w3 => arith(I.S8ADDQ,a,zeroT,d,an)            | SOME 0w3 => arith(I.S8ADDQ,a,zeroT,d,an)
666            | _        => arith(I.SLL,a,b,d,an)            | _        => arith(I.SLL,a,b,d,an)
667    
668        and sra32(a,b,d,an) =         (* On the alpha, all 32 bit values are already sign extended.
669            let val ra = expr a          * So no sign extension is necessary.  We do the same for
670                val rb = opn b          * sra32 and sra64
               val t  = newReg()  
           in  (* On the alpha, all 32 bit values are already sign extended.  
                * So no sign extension is necessary.  
                * signExt32(ra,t);  
                * mark(I.OPERATE{oper=I.SRA,ra=t,rb=rb,rc=d},an)  
671                 *)                 *)
672                mark(I.OPERATE{oper=I.SRA,ra=ra,rb=rb,rc=d},an)        and sra(a,b,d,an) =
           end  
   
       and sra64(a,b,d,an) =  
673            mark(I.OPERATE{oper=I.SRA,ra=expr a,rb=opn b,rc=d},an)            mark(I.OPERATE{oper=I.SRA,ra=expr a,rb=opn b,rc=d},an)
674    
675        and srl32(a,b,d,an) =        and srl32(a,b,d,an) =
# Line 966  Line 962 
962            | T.REMS(32,a,b) => pseudo(P.reml,a,b,d)            | T.REMS(32,a,b) => pseudo(P.reml,a,b,d)
963    
964            | T.SLL(32,a,b) => sll32(a,b,d,an)            | T.SLL(32,a,b) => sll32(a,b,d,an)
965            | T.SRA(32,a,b) => sra32(a,b,d,an)            | T.SRA(32,a,b) => sra(a,b,d,an)
966            | T.SRL(32,a,b) => srl32(a,b,d,an)            | T.SRL(32,a,b) => srl32(a,b,d,an)
967    
968              (* 64 bit support *)              (* 64 bit support *)
# Line 994  Line 990 
990            | T.REMS(64,a,b) => pseudo(P.remq,a,b,d)            | T.REMS(64,a,b) => pseudo(P.remq,a,b,d)
991    
992            | T.SLL(64,a,b) => sll64(a,b,d,an)            | T.SLL(64,a,b) => sll64(a,b,d,an)
993            | T.SRA(64,a,b) => sra64(a,b,d,an)            | T.SRA(64,a,b) => sra(a,b,d,an)
994            | T.SRL(64,a,b) => srl64(a,b,d,an)            | T.SRL(64,a,b) => srl64(a,b,d,an)
995    
996              (* special bit operations with complement *)              (* special bit operations with complement *)
# Line 1202  Line 1198 
1198                  fun fall(cmp1, br1, cmp2, br2) =                  fun fall(cmp1, br1, cmp2, br2) =
1199                  let val tmpR1 = newFreg()                  let val tmpR1 = newFreg()
1200                      val tmpR2 = newFreg()                      val tmpR2 = newFreg()
1201                      val fallLab = Label.newLabel ""                      val fallLab = Label.anon()
1202                  in  emit(I.DEFFREG(tmpR1));                  in  emit(I.DEFFREG(tmpR1));
1203                      emit(I.FOPERATE{oper=cmp1, fa=f1, fb=f2, fc=tmpR1});                      emit(I.FOPERATE{oper=cmp1, fa=f1, fb=f2, fc=tmpR1});
1204                      emit(I.TRAPB);                      emit(I.TRAPB);
# Line 1416  Line 1412 
1412        and goto(lab,an) = mark(I.BRANCH{b=I.BR,r=zeroR,lab=lab},an)        and goto(lab,an) = mark(I.BRANCH{b=I.BR,r=zeroR,lab=lab},an)
1413    
1414           (* generate an call instruction *)           (* generate an call instruction *)
1415        and call(ea,flow,defs,uses,mem,an) =        and call(ea,flow,defs,uses,mem,cutTo,an,0) =
1416         let val defs=cellset defs         let val defs=cellset defs
1417             val uses=cellset uses             val uses=cellset uses
1418             val instr =             val instr =
1419                 case (ea, flow) of                 case (ea, flow) of
1420                   (T.LABEL lab, [_]) =>                   (T.LABEL lab, [_]) =>
1421                     I.BSR{lab=lab,r=C.returnAddr,defs=defs,uses=uses,mem=mem}                        I.BSR{lab=lab,r=C.returnAddr,defs=defs,uses=uses,
1422                                cutsTo=cutTo,mem=mem}
1423                 | _ => I.JSR{r=C.returnAddr,b=expr ea,                 | _ => I.JSR{r=C.returnAddr,b=expr ea,
1424                              d=0,defs=defs,uses=uses,mem=mem}                                   d=0,defs=defs,uses=uses,cutsTo=cutTo,mem=mem}
1425         in  mark(instr,an)         in  mark(instr,an)
1426         end         end
1427            | call _ = error "pops<>0 not implemented"
1428    
1429        and doCCexpr(T.CC(_,r),d,an) = move(r,d,an)        and doCCexpr(T.CC(_,r),d,an) = move(r,d,an)
1430          | doCCexpr(T.FCC(_,r),d,an) = fmove(r,d,an)          | doCCexpr(T.FCC(_,r),d,an) = fmove(r,d,an)
# Line 1454  Line 1452 
1452            | T.JMP(T.LABEL lab,_) => goto(lab,an)            | T.JMP(T.LABEL lab,_) => goto(lab,an)
1453            | T.JMP(e,labs) => mark(I.JMPL({r=zeroR,b=expr e,d=0},labs),an)            | T.JMP(e,labs) => mark(I.JMPL({r=zeroR,b=expr e,d=0},labs),an)
1454            | T.BCC(cc,lab) => branch(cc,lab,an)            | T.BCC(cc,lab) => branch(cc,lab,an)
1455            | T.CALL{funct,targets,defs,uses,region,...} =>            | T.CALL{funct,targets,defs,uses,region,pops,...} =>
1456                call(funct,targets,defs,uses,region,an)                call(funct,targets,defs,uses,region,[],an,pops)
1457              | T.FLOW_TO(T.CALL{funct,targets,defs,uses,region,pops,...},cutTo) =>
1458                  call(funct,targets,defs,uses,region,cutTo,an,pops)
1459            | T.RET _ => mark(I.RET{r=zeroR,b=C.returnAddr,d=0},an)            | T.RET _ => mark(I.RET{r=zeroR,b=C.returnAddr,d=0},an)
1460            | T.STORE(8,ea,data,mem) => store8(ea,data,mem,an)            | T.STORE(8,ea,data,mem) => store8(ea,data,mem,an)
1461            | T.STORE(16,ea,data,mem) => store16(ea,data,mem,an)            | T.STORE(16,ea,data,mem) => store16(ea,data,mem,an)
# Line 1506  Line 1506 
1506             entryLabel  = entryLabel,             entryLabel  = entryLabel,
1507             comment     = comment,             comment     = comment,
1508             annotation  = annotation,             annotation  = annotation,
1509               getAnnotations = getAnnotations,
1510             exitBlock   = fn regs => exitBlock(cellset regs)             exitBlock   = fn regs => exitBlock(cellset regs)
1511           }           }
1512     in  self()     in  self()

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