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[smlnj] View of /sml/trunk/src/MLRISC/alpha32/alpha32PseudoInstr.sig
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View of /sml/trunk/src/MLRISC/alpha32/alpha32PseudoInstr.sig

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Revision 94 - (download) (as text) (annotate)
Tue May 12 21:56:22 1998 UTC (24 years, 4 months ago) by monnier
File size: 700 byte(s)
This commit was generated by cvs2svn to compensate for changes in r93,
which included commits to RCS files with non-trunk default branches.
(* alpha32PseudoInstr.sig --- alpha pseudo instructions *)

signature ALPHA32_PSEUDO_INSTR = sig
   structure I : ALPHA32INSTR
  
   type reduceOpnd = I.operand -> int

   val divl : {ra:int, rb:I.operand, rc:int} * reduceOpnd -> I.instruction list
     (* divide longword generating a trap on divide by zero *)

   val divlu : {ra:int, rb:I.operand, rc:int} * reduceOpnd -> I.instruction list
     (* divide longword unsigned generating a trap on divide by zero *)

   val cvti2d : {opnd:I.operand, fd:int} * reduceOpnd  -> I.instruction list
     (* convert longword to double *)
end 

(*
 * $Log: alpha32PseudoInstr.sig,v $
 * Revision 1.1.1.1  1998/04/08 18:39:01  george
 * Version 110.5
 *
 *)

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