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[smlnj] Log of /sml/trunk/src/MLRISC/hppa/emit/hppaMC.sml
[smlnj] / sml / trunk / src / MLRISC / hppa / emit / hppaMC.sml  
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Revision 1203 - (view) (download) (annotate) - [select for diffs]
Modified Sat May 18 18:21:53 2002 UTC (17 years, 3 months ago) by leunga
File length: 28999 byte(s)
Diff to previous 1009
     Changed mdl gen to make it compile.
     x86 asssembly fix for fcmpi.

Revision 1009 - (view) (download) (annotate) - [select for diffs]
Modified Wed Jan 9 19:44:22 2002 UTC (17 years, 7 months ago) by george
File length: 28999 byte(s)
Diff to previous 1003
	Removed the native COPY and FCOPY instructions
	from all the architectures and replaced it with the
	explicit COPY instruction from the previous commit.

	It is now possible to simplify many of the optimizations
	modules that manipulate copies. This has not been
	done in this change.

Revision 1003 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 7 02:45:32 2001 UTC (17 years, 8 months ago) by george
File length: 29125 byte(s)
Diff to previous 984
Changed the representation of instructions from being fully abstract
to being partially concrete. That is to say:

  from
	type instruction

  to
	type instr				(* machine instruction *)

	datatype instruction =
	    LIVE of {regs: C.cellset, spilled: C.cellset}
          | KILL of {regs: C.cellset, spilled: C.cellset}
          | COPYXXX of {k: CB.cellkind, dst: CB.cell list, src: CB.cell list}
          | ANNOTATION of {i: instruction, a: Annotations.annotation}
          | INSTR of instr

This makes the handling of certain special instructions that appear on
all architectures easier and uniform.

LIVE and KILL say that a list of registers are live or killed at the
program point where they appear. No spill code is generated when an
element of the 'regs' field is spilled, but the register is moved to
the 'spilled' (which is present, more for debugging than anything else).

LIVE replaces the (now deprecated) DEFFREG instruction on the alpha.
We used to generate:

	DEFFREG f1
	f1 := f2 + f3
        trapb

but now generate:

	f1 := f2 + f3
	trapb
	LIVE {regs=[f1,f2,f3], spilled=[]}

Furthermore, the DEFFREG (hack) required that all floating point instruction
use all registers mentioned in the instruction. Therefore f1 := f2 + f3,
defines f1 and uses [f1,f2,f3]! This hack is no longer required resulting
in a cleaner alpha implementation. (Hopefully, intel will not get rid of
this architecture).

COPYXXX is intended to replace the parallel COPY and FCOPY  available on
all the architectures. This will result in further simplification of the
register allocator that must be aware of them for coalescing purposes, and
will also simplify certain aspects of the machine description that provides
callbacks related to parallel copies.

ANNOTATION should be obvious, and now INSTR represents the honest to God
machine instruction set!

The <arch>/instructions/<arch>Instr.sml files define certain utility
functions for making porting easier -- essentially converting upper case
to lower case. All machine instructions (of type instr) are in upper case,
and the lower case form generates an MLRISC instruction. For example on
the alpha we have:

  datatype instr =
     LDA of {r:cell, b:cell, d:operand}
   | ...

  val lda : {r:cell, b:cell, d:operand} -> instruction
    ...

where lda is just (INSTR o LDA), etc.

Revision 984 - (view) (download) (annotate) - [select for diffs]
Modified Wed Nov 21 19:00:08 2001 UTC (17 years, 9 months ago) by george
File length: 28924 byte(s)
Diff to previous 909
  Implemented a complete redesign of MLRISC pseudo-ops. Now there
  ought to never be any question of incompatabilities with
  pseudo-op syntax expected by host assemblers.

  For now, only modules supporting GAS syntax are implemented
  but more should follow, such as MASM, and vendor assembler
  syntax, e.g. IBM as, Sun as, etc.

Revision 909 - (view) (download) (annotate) - [select for diffs]
Modified Fri Aug 24 17:48:53 2001 UTC (18 years ago) by george
File length: 28815 byte(s)
Diff to previous 889
removed clusters from MLRISC

Revision 889 - (view) (download) (annotate) - [select for diffs]
Modified Thu Jul 19 20:35:20 2001 UTC (18 years, 1 month ago) by george
File length: 28777 byte(s)
Diff to previous 815
Substantial simplification in the CELLS interface

Revision 815 - (view) (download) (annotate) - [select for diffs]
Modified Fri May 4 05:09:10 2001 UTC (18 years, 3 months ago) by leunga
File length: 28696 byte(s)
Diff to previous 796

    Moby related MLRISC changes

Revision 796 - (view) (download) (annotate) - [select for diffs]
Modified Tue Mar 6 00:04:33 2001 UTC (18 years, 5 months ago) by leunga
File length: 28595 byte(s)
Diff to previous 775

   Support for alternative control-flow, exception handlers added.

Revision 775 - (view) (download) (annotate) - [select for diffs]
Modified Fri Jan 12 01:17:51 2001 UTC (18 years, 7 months ago) by leunga
File length: 28579 byte(s)
Diff to previous 744

    Merging the types labexp and mltree.
    tag leunga-20010111-labexp=mltree

Revision 744 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 8 04:11:42 2000 UTC (18 years, 8 months ago) by leunga
File length: 28630 byte(s)
Diff to previous 657

   A CVS update record!

   Changed type cell from int to datatype, and numerous other changes.
   Affect every client of MLRISC.  Lal says this can be bootstrapped on all
   machines.  See smlnj/HISTORY for details.

   Tag:  leunga-20001207-cell-monster-hack

Revision 657 - (view) (download) (annotate) - [select for diffs]
Modified Fri Jun 9 05:20:54 2000 UTC (19 years, 2 months ago) by leunga
File length: 28019 byte(s)
Diff to previous 651

     None of these changes should affect SML/NJ.  See HISTORY file for details.
     CVS Tag=leunga-20000609-various

Revision 651 - (view) (download) (annotate) - [select for diffs]
Modified Thu Jun 1 18:34:03 2000 UTC (19 years, 2 months ago) by monnier
File length: 28015 byte(s)
Diff to previous 624
bring revisions from the vendor branch to the trunk

Revision 624 - (view) (download) (annotate) - [select for diffs]
Modified Fri Apr 21 03:06:21 2000 UTC (19 years, 4 months ago) by leunga
File length: 28015 byte(s)
Diff to previous 606

   This update synchronizes my repository with Yale's.  Most of these
changes are related to C--, Moby, and my optimizations.  It should have
little impact on SML/NJ.

   CVS tag leunga-20000420-ssa-c---stuff

Revision 606 - (view) (download) (annotate) - [select for diffs]
Modified Sun Apr 9 23:10:59 2000 UTC (19 years, 4 months ago) by leunga
File length: 27915 byte(s)
Diff to previous 593

   Assembly fix for x86 and other miscellaneous changes to MLRISC

Revision 593 - (view) (download) (annotate) - [select for diffs]
Modified Tue Apr 4 07:26:33 2000 UTC (19 years, 4 months ago) by leunga
File length: 27914 byte(s)
Diff to previous 585

    Fixes related to C--, Moby and my optimizations.
    CVS tag=leunga-20000404-C--Moby

Revision 585 - (view) (download) (annotate) - [select for diffs]
Modified Wed Mar 29 23:55:35 2000 UTC (19 years, 4 months ago) by leunga
File length: 27914 byte(s)
Diff to previous 579

   This update contains major changes to the code generator and various
back ends.  Please see the entry leunga-20000327-mlriscGen_hppa_alpha_x86
in the file sml/HISTORY for details.

Revision 579 - (view) (download) (annotate) - [select for diffs]
Modified Wed Mar 22 06:33:08 2000 UTC (19 years, 5 months ago) by leunga
File length: 27415 byte(s)
Diff to previous 555


1. X86 fixes/changes

   a.  x86Rewrite bug with MUL3 (found by Lal)
   b.  Added the instructions FSTS, FSTL

2. PA-RISC fixes/changes

   a.  B label should not be a delay slot candidate!  Why did this work?
   b.  ADDT(32, REG(32, r), LI n) now generates one instruction instead of two,
       as it should be.
   c.  The assembly syntax for fstds and fstdd was wrong.
   d.  Added the composite instruction COMICLR/LDO, which is the immediate
       operand variant of COMCLR/LDO.

3. Generic MLRISC

   a.  shuffle.sml rewritten to be slightly more efficient
   b.  DIV bug in mltree-simplify fixed (found by Fermin)

4. Register Allocator

   a.  I now release the interference graph earlier during spilling.
       May improve memory usage.

Revision 555 - (view) (download) (annotate) - [select for diffs]
Modified Fri Mar 3 16:10:30 2000 UTC (19 years, 5 months ago) by george
File length: 27395 byte(s)
Diff to previous 545
lal-20000303-new mltree -- take II

Revision 545 - (view) (download) (annotate) - [select for diffs]
Modified Thu Feb 24 13:56:44 2000 UTC (19 years, 6 months ago) by george
File length: 26873 byte(s)
Diff to previous 470
  Changes to MLTREE

Revision 470 - (view) (download) (annotate) - [select for diffs]
Modified Wed Nov 10 22:42:52 1999 UTC (19 years, 9 months ago) by monnier
File length: 27000 byte(s)
Copied from: sml/branches/SMLNJ/src/MLRISC/hppa/emit/hppaMC.sml revision 469
Diff to previous 469
This commit was generated by cvs2svn to compensate for changes in r469,
which included commits to RCS files with non-trunk default branches.

Revision 469 - (view) (download) (annotate) - [select for diffs]
Modified Wed Nov 10 22:42:52 1999 UTC (19 years, 9 months ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/hppa/emit/hppaMC.sml
File length: 27000 byte(s)
Diff to previous 429
version 110.23

Revision 429 - (view) (download) (annotate) - [select for diffs]
Modified Wed Sep 8 09:47:00 1999 UTC (19 years, 11 months ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/hppa/emit/hppaMC.sml
File length: 27037 byte(s)
Diff to previous 411
version 110.21

Revision 411 - (view) (download) (annotate) - [select for diffs]
Modified Fri Sep 3 00:25:03 1999 UTC (19 years, 11 months ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/hppa/emit/hppaMC.sml
File length: 26726 byte(s)
Diff to previous 245
version 110.19

Revision 245 - (view) (download) (annotate) - [select for diffs]
Added Sat Apr 17 18:47:12 1999 UTC (20 years, 4 months ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/hppa/emit/hppaMC.sml
File length: 13364 byte(s)
version 110.16

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