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[smlnj] Diff of /sml/trunk/src/MLRISC/ra/ra-core.sig
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Diff of /sml/trunk/src/MLRISC/ra/ra-core.sig

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sml/branches/SMLNJ/src/MLRISC/ra/ra-core.sig revision 475, Wed Nov 10 22:59:58 1999 UTC sml/trunk/src/MLRISC/ra/ra-core.sig revision 651, Thu Jun 1 18:34:03 2000 UTC
# Line 9  Line 9 
9  sig  sig
10    
11     structure G  : RA_GRAPH     structure G  : RA_GRAPH
12       structure BM :
13       sig
14          val size   : G.bitMatrix -> int
15          val member : G.bitMatrix -> int * int -> bool
16          val add    : G.bitMatrix -> int * int -> bool
17       end
18       structure MV : RA_PRIORITY_QUEUE where type elem = G.move
19       structure FZ : RA_PRIORITY_QUEUE where type elem = G.node
20    
21     type move_queue     type move_queue
22     type freeze_queue     type freeze_queue
23    
24       val NO_OPTIMIZATION      : G.mode
25       val BIASED_SELECTION     : G.mode
26       val DEAD_COPY_ELIM       : G.mode
27       val COMPUTE_SPAN         : G.mode
28       val SAVE_COPY_TEMPS      : G.mode
29       val HAS_PARALLEL_COPIES  : G.mode
30    
31     (*     (*
32      * Basic functions      * Basic functions
33      *)      *)
# Line 45  Line 60 
60      * and a list of moves      * and a list of moves
61      *)      *)
62     val initWorkLists : G.interferenceGraph ->     val initWorkLists : G.interferenceGraph ->
63            { moves : G.move list,            { moves : G.move list
             deadCopyElim : bool  
64            } ->            } ->
65            { simplifyWkl : G.node list,            { simplifyWkl : G.node list,
66              moveWkl     : move_queue,              moveWkl     : move_queue,
# Line 60  Line 74 
74     val clearGraph : G.interferenceGraph -> unit     val clearGraph : G.interferenceGraph -> unit
75    
76     (*     (*
77      * Remove all adjacency lists from the nodes table      * Remove all adjacency lists from the nodes table.
78      *)      *)
79     val clearNodes : G.interferenceGraph -> unit     val clearNodes : G.interferenceGraph -> unit
80    
# Line 91  Line 105 
105     val potentialSpillNode :     val potentialSpillNode :
106          G.interferenceGraph ->          G.interferenceGraph ->
107             { node  : G.node,             { node  : G.node,
108                 cost  : real,
109               stack : G.node list               stack : G.node list
110             } ->             } ->
111             { moveWkl   : move_queue,             { moveWkl   : move_queue,
# Line 104  Line 119 
119      *)      *)
120     val select :     val select :
121          G.interferenceGraph ->          G.interferenceGraph ->
122             { biased : bool, (* use biased coloring too? *)             { stack  : G.node list
              stack  : G.node list  
123             } ->             } ->
124             { spills : G.node list (* actual spills *)             { spills : G.node list (* actual spills *)
125             }             }
126    
127     (*     (*
128      * Spill propagation/coalescing phase      * Incorporate memory <-> register moves
     *)  
    val spillPropagation : G.interferenceGraph -> G.node list -> G.node list  
   
    (*  
     * Spill coalescing phase  
129      *)      *)
130     val spillCoalescing : G.interferenceGraph -> G.node list -> unit     val initMemMoves : G.interferenceGraph -> unit
131    
132     (*     (*
133      * Spill coloring phase      * Compute spill savings due to memory <-> register moves
134      *)      *)
135     val spillColoring : G.interferenceGraph -> G.node list -> unit     val moveSavings : G.interferenceGraph -> (int -> int)
136    
137  end  end

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