78 |
val NO_OPTIMIZATION = 0wx0 |
val NO_OPTIMIZATION = 0wx0 |
79 |
val DEAD_COPY_ELIM = Core.DEAD_COPY_ELIM |
val DEAD_COPY_ELIM = Core.DEAD_COPY_ELIM |
80 |
val BIASED_SELECTION = Core.BIASED_SELECTION |
val BIASED_SELECTION = Core.BIASED_SELECTION |
81 |
|
val HAS_PARALLEL_COPIES = Core.HAS_PARALLEL_COPIES |
82 |
val SPILL_COALESCING = 0wx100 |
val SPILL_COALESCING = 0wx100 |
83 |
val SPILL_COLORING = 0wx200 |
val SPILL_COLORING = 0wx200 |
84 |
val SPILL_PROPAGATION = 0wx400 |
val SPILL_PROPAGATION = 0wx400 |
96 |
val cfg_before_ra = MLRiscControl.getFlag "dump-cfg-before-ra" |
val cfg_before_ra = MLRiscControl.getFlag "dump-cfg-before-ra" |
97 |
val cfg_after_ra = MLRiscControl.getFlag "dump-cfg-after-ra" |
val cfg_after_ra = MLRiscControl.getFlag "dump-cfg-after-ra" |
98 |
val cfg_after_spill = MLRiscControl.getFlag "dump-cfg-after-spilling" |
val cfg_after_spill = MLRiscControl.getFlag "dump-cfg-after-spilling" |
99 |
|
val cfg_before_ras = MLRiscControl.getFlag "dump-cfg-before-all-ra" |
100 |
|
val cfg_after_ras = MLRiscControl.getFlag "dump-cfg-after-all-ra" |
101 |
val dump_graph = MLRiscControl.getFlag "dump-interference-graph" |
val dump_graph = MLRiscControl.getFlag "dump-interference-graph" |
102 |
val debug_spill = MLRiscControl.getFlag "ra-debug-spilling" |
val debug_spill = MLRiscControl.getFlag "ra-debug-spilling" |
103 |
val ra_count = MLRiscControl.getCounter "ra-count" |
val ra_count = MLRiscControl.getCounter "ra-count" |
153 |
|
|
154 |
(* the nodes table *) |
(* the nodes table *) |
155 |
val nodes = Intmap.new(numCell,NodeTable) |
val nodes = Intmap.new(numCell,NodeTable) |
156 |
|
val mode = if isOn(HAS_PARALLEL_COPIES, mode) then |
157 |
|
Word.orb(Core.SAVE_COPY_TEMPS, mode) |
158 |
|
else mode |
159 |
(* create an empty interference graph *) |
(* create an empty interference graph *) |
160 |
val G = G.newGraph{nodes=nodes, |
val G = G.newGraph{nodes=nodes, |
161 |
K=K, |
K=K, |
240 |
" uses="^Int.toString(length(!uses))^"\n" |
" uses="^Int.toString(length(!uses))^"\n" |
241 |
) |
) |
242 |
) else (); |
) else (); |
243 |
{node=node,spillWkl=spillWkl} |
{node=node,cost=cost,spillWkl=spillWkl} |
244 |
end |
end |
245 |
|
|
246 |
(* |
(* |
278 |
val _ = if isOn(mode,SPILL_PROPAGATION+SPILL_COALESCING) then |
val _ = if isOn(mode,SPILL_PROPAGATION+SPILL_COALESCING) then |
279 |
Core.initMemMoves G |
Core.initMemMoves G |
280 |
else () |
else () |
281 |
|
(* |
282 |
val spills = if isOn(mode,SPILL_PROPAGATION) then |
val spills = if isOn(mode,SPILL_PROPAGATION) then |
283 |
Core.spillPropagation G spills else spills |
Core.spillPropagation G spills else spills |
284 |
val _ = if isOn(mode,SPILL_COALESCING) then |
val _ = if isOn(mode,SPILL_COALESCING) then |
287 |
Core.spillColoring G spills else () |
Core.spillColoring G spills else () |
288 |
val _ = if isOn(mode,SPILL_COALESCING+SPILL_PROPAGATION) then |
val _ = if isOn(mode,SPILL_COALESCING+SPILL_PROPAGATION) then |
289 |
markMemRegs spills else () |
markMemRegs spills else () |
290 |
|
*) |
291 |
val _ = logGraph("actual spill",G); |
val _ = logGraph("actual spill",G); |
292 |
val {simplifyWkl,freezeWkl,moveWkl,spillWkl} = |
val {simplifyWkl,freezeWkl,moveWkl,spillWkl} = |
293 |
Core.initWorkLists G |
Core.initWorkLists G |
335 |
if !pseudoCount = 0 (* all nodes simplified *) |
if !pseudoCount = 0 (* all nodes simplified *) |
336 |
then stack |
then stack |
337 |
else |
else |
338 |
let val {node,spillWkl} = |
let val {node,cost,spillWkl} = |
339 |
chooseVictim{spillWkl=spillWkl} |
chooseVictim{spillWkl=spillWkl} |
340 |
in case node of |
in case node of |
341 |
SOME node => (* spill node and continue *) |
SOME node => (* spill node and continue *) |
342 |
let val _ = if debug then print "-" else () |
let val _ = if debug then print "-" else () |
343 |
val {moveWkl,freezeWkl,stack} = |
val {moveWkl,freezeWkl,stack} = |
344 |
potentialSpill{node=node,stack=stack} |
potentialSpill{node=node, |
345 |
|
cost=cost, |
346 |
|
stack=stack} |
347 |
in iterate([],moveWkl,freezeWkl,spillWkl,stack) |
in iterate([],moveWkl,freezeWkl,spillWkl,stack) |
348 |
end |
end |
349 |
| NONE => stack (* nothing to spill *) |
| NONE => stack (* nothing to spill *) |
394 |
fun regallocs [] = () |
fun regallocs [] = () |
395 |
| regallocs(p::ps) = (regalloc p; regallocs ps) |
| regallocs(p::ps) = (regalloc p; regallocs ps) |
396 |
|
|
397 |
in regallocs params; |
in dumpFlowgraph(cfg_before_ras,"before register allocation"); |
398 |
|
regallocs params; |
399 |
|
dumpFlowgraph(cfg_after_ras,"after register allocation"); |
400 |
flowgraph |
flowgraph |
401 |
end |
end |
402 |
|
|