Home My Page Projects Code Snippets Project Openings SML/NJ
Summary Activity Forums Tracker Lists Tasks Docs Surveys News SCM Files

SCM Repository

[smlnj] Annotation of /sml/trunk/src/MLRISC/sparc/mltree/sparc.sml
ViewVC logotype

Annotation of /sml/trunk/src/MLRISC/sparc/mltree/sparc.sml

Parent Directory Parent Directory | Revision Log Revision Log


Revision 657 - (view) (download)

1 : monnier 245 (*
2 : monnier 411 * This is a new instruction selection module for Sparc,
3 :     * using the new instruction representation and the new MLTREE representation.
4 :     * Support for V9 has been added.
5 : monnier 245 *
6 : monnier 411 * The cc bit in arithmetic op are now embedded within the arithmetic
7 :     * opcode. This should save some space.
8 : monnier 245 *
9 : monnier 411 * -- Allen
10 : monnier 245 *)
11 :    
12 :     functor Sparc
13 :     (structure SparcInstr : SPARCINSTR
14 : monnier 411 structure SparcMLTree : MLTREE
15 :     structure PseudoInstrs : SPARC_PSEUDO_INSTR
16 : george 555 structure ExtensionComp : MLTREE_EXTENSION_COMP
17 :     where I = SparcInstr and T = SparcMLTree
18 : monnier 475 sharing SparcMLTree.Region = SparcInstr.Region
19 : george 545 sharing SparcMLTree.LabelExp = SparcInstr.LabelExp
20 : monnier 475 sharing PseudoInstrs.I = SparcInstr
21 : monnier 411 (*
22 :     * The client should also specify these parameters.
23 :     * These are the estimated cost of these instructions.
24 :     * The code generator will use alternative sequences that are
25 :     * cheaper when their costs are lower.
26 :     *)
27 : george 545 val muluCost : int ref (* cost of unsigned multiplication in cycles *)
28 : monnier 411 val divuCost : int ref (* cost of unsigned division in cycles *)
29 :     val multCost : int ref (* cost of trapping/signed multiplication in cycles *)
30 :     val divtCost : int ref (* cost of trapping/signed division in cycles *)
31 :    
32 :     (*
33 :     * If you don't want to use register windows at all, set this to false.
34 :     *)
35 :     val registerwindow : bool ref (* should we use register windows? *)
36 :    
37 :     val V9 : bool (* should we use V9 instruction set? *)
38 :     val useBR : bool ref
39 :     (* should we use the BR instruction (when in V9)?
40 :     * I think it is a good idea to use it.
41 :     *)
42 : monnier 245 ) : MLTREECOMP =
43 :     struct
44 : monnier 411 structure T = SparcMLTree
45 : monnier 429 structure S = T.Stream
46 : monnier 411 structure R = SparcMLTree.Region
47 :     structure I = SparcInstr
48 :     structure C = I.C
49 : george 545 structure LE = I.LabelExp
50 : monnier 245 structure W = Word32
51 :     structure P = PseudoInstrs
52 : george 545 structure A = MLRiscAnnotations
53 : monnier 245
54 : george 545 type instrStream = (I.instruction,C.regmap,C.cellset) T.stream
55 : george 555 type mltreeStream = (T.stm,C.regmap,T.mlrisc list) T.stream
56 : george 545
57 : leunga 624 val intTy = if V9 then 64 else 32
58 : monnier 411 structure Gen = MLTreeGen(structure T = T
59 : leunga 624 val intTy = intTy
60 : monnier 411 val naturalWidths = if V9 then [32,64] else [32]
61 : monnier 429 datatype rep = SE | ZE | NEITHER
62 :     val rep = NEITHER
63 : monnier 411 )
64 : monnier 245
65 : monnier 411 functor Multiply32 = MLTreeMult
66 :     (structure I = I
67 :     structure T = T
68 : monnier 429 type arg = {r1:C.cell,r2:C.cell,d:C.cell}
69 :     type argi = {r:C.cell,i:int,d:C.cell}
70 : monnier 411
71 :     val intTy = 32
72 :     fun mov{r,d} = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
73 :     fun add{r1,r2,d} = I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}
74 :     fun slli{r,i,d} = [I.SHIFT{s=I.SLL,r=r,i=I.IMMED i,d=d}]
75 :     fun srli{r,i,d} = [I.SHIFT{s=I.SRL,r=r,i=I.IMMED i,d=d}]
76 :     fun srai{r,i,d} = [I.SHIFT{s=I.SRA,r=r,i=I.IMMED i,d=d}]
77 :     )
78 : monnier 245
79 : monnier 411 functor Multiply64 = MLTreeMult
80 :     (structure I = I
81 :     structure T = T
82 : monnier 429 type arg = {r1:C.cell,r2:C.cell,d:C.cell}
83 :     type argi = {r:C.cell,i:int,d:C.cell}
84 : monnier 411
85 :     val intTy = 64
86 :     fun mov{r,d} = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
87 :     fun add{r1,r2,d} = I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}
88 :     fun slli{r,i,d} = [I.SHIFT{s=I.SLLX,r=r,i=I.IMMED i,d=d}]
89 :     fun srli{r,i,d} = [I.SHIFT{s=I.SRLX,r=r,i=I.IMMED i,d=d}]
90 :     fun srai{r,i,d} = [I.SHIFT{s=I.SRAX,r=r,i=I.IMMED i,d=d}]
91 :     )
92 : monnier 245
93 : monnier 411 (* signed, trapping version of multiply and divide *)
94 :     structure Mult32 = Multiply32
95 :     (val trapping = true
96 :     val multCost = multCost
97 :     fun addv{r1,r2,d} =
98 :     I.ARITH{a=I.ADDCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap32
99 :     fun subv{r1,r2,d} =
100 :     I.ARITH{a=I.SUBCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap32
101 :     val sh1addv = NONE
102 :     val sh2addv = NONE
103 :     val sh3addv = NONE
104 :     )
105 : monnier 429 (val signed = true)
106 : monnier 245
107 : monnier 411 (* unsigned, non-trapping version of multiply and divide *)
108 : leunga 657 functor Mul32 = Multiply32
109 : monnier 411 (val trapping = false
110 :     val multCost = muluCost
111 :     fun addv{r1,r2,d} = [I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}]
112 :     fun subv{r1,r2,d} = [I.ARITH{a=I.SUB,r=r1,i=I.REG r2,d=d}]
113 :     val sh1addv = NONE
114 :     val sh2addv = NONE
115 :     val sh3addv = NONE
116 :     )
117 : leunga 657 structure Mulu32 = Mul32(val signed = false)
118 : monnier 245
119 : leunga 657 structure Muls32 = Mul32(val signed = true)
120 :    
121 : monnier 411 (* signed, trapping version of multiply and divide *)
122 :     structure Mult64 = Multiply64
123 :     (val trapping = true
124 :     val multCost = multCost
125 :     fun addv{r1,r2,d} =
126 :     I.ARITH{a=I.ADDCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap64
127 :     fun subv{r1,r2,d} =
128 :     I.ARITH{a=I.SUBCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap64
129 :     val sh1addv = NONE
130 :     val sh2addv = NONE
131 :     val sh3addv = NONE
132 :     )
133 : monnier 429 (val signed = true)
134 : monnier 245
135 : monnier 411 (* unsigned, non-trapping version of multiply and divide *)
136 : leunga 657 functor Mul64 = Multiply64
137 : monnier 411 (val trapping = false
138 :     val multCost = muluCost
139 :     fun addv{r1,r2,d} = [I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}]
140 :     fun subv{r1,r2,d} = [I.ARITH{a=I.SUB,r=r1,i=I.REG r2,d=d}]
141 :     val sh1addv = NONE
142 :     val sh2addv = NONE
143 :     val sh3addv = NONE
144 :     )
145 : leunga 657 structure Mulu64 = Mul64(val signed = false)
146 : monnier 245
147 : leunga 657 structure Muls64 = Mul64(val signed = true)
148 :    
149 : monnier 411 datatype commutative = COMMUTE | NOCOMMUTE
150 :     datatype cc = REG (* write to register *)
151 :     | CC (* set condition code *)
152 :     | CC_REG (* do both *)
153 : monnier 245
154 : monnier 411 fun error msg = MLRiscErrorMsg.error("Sparc",msg)
155 : monnier 245
156 : monnier 411 fun selectInstructions
157 : george 545 (instrStream as
158 :     S.STREAM{emit,defineLabel,entryLabel,pseudoOp,annotation,
159 : monnier 429 beginCluster,endCluster,exitBlock,alias,phi,comment,...}) =
160 : monnier 411 let
161 :     (* Flags *)
162 :     val useBR = !useBR
163 :     val registerwindow = !registerwindow
164 : monnier 245
165 : monnier 411 val trap32 = PseudoInstrs.overflowtrap32
166 :     val trap64 = PseudoInstrs.overflowtrap64
167 :     val newReg = C.newReg
168 :     val newFreg = C.newFreg
169 :     fun immed13 n = ~4096 <= n andalso n < 4096
170 :     fun immed13w w = let val x = W.~>>(w,0w12)
171 :     in x = 0w0 orelse (W.notb x) = 0w0 end
172 :     fun splitw w = {hi=W.toInt(W.>>(w,0w10)),lo=W.toInt(W.andb(w,0wx3ff))}
173 :     fun split n = splitw(W.fromInt n)
174 : monnier 245
175 : monnier 411
176 :     val zeroOpn = I.REG 0 (* zero value operand *)
177 :     val _ = if C.psr <> 65 then error "Wrong encoding for psr" else ()
178 : monnier 245
179 : monnier 411 fun cond T.LT = I.BL
180 :     | cond T.LTU = I.BCS
181 :     | cond T.LE = I.BLE
182 :     | cond T.LEU = I.BLEU
183 :     | cond T.EQ = I.BE
184 :     | cond T.NE = I.BNE
185 :     | cond T.GE = I.BGE
186 :     | cond T.GEU = I.BCC
187 :     | cond T.GT = I.BG
188 :     | cond T.GTU = I.BGU
189 : monnier 245
190 : monnier 411 fun rcond T.LT = I.RLZ
191 :     | rcond T.LE = I.RLEZ
192 :     | rcond T.EQ = I.RZ
193 :     | rcond T.NE = I.RNZ
194 :     | rcond T.GE = I.RGEZ
195 :     | rcond T.GT = I.RGZ
196 :     | rcond _ = error "rcond"
197 : monnier 245
198 : monnier 411 fun signedCmp(T.LT | T.LE | T.EQ | T.NE | T.GE | T.GT) = true
199 :     | signedCmp _ = false
200 : monnier 245
201 : monnier 411 fun fcond T.== = I.FBE
202 :     | fcond T.?<> = I.FBNE
203 :     | fcond T.? = I.FBU
204 :     | fcond T.<=> = I.FBO
205 :     | fcond T.> = I.FBG
206 :     | fcond T.>= = I.FBGE
207 :     | fcond T.?> = I.FBUG
208 :     | fcond T.?>= = I.FBUGE
209 :     | fcond T.< = I.FBL
210 :     | fcond T.<= = I.FBLE
211 :     | fcond T.?< = I.FBUL
212 :     | fcond T.?<= = I.FBULE
213 :     | fcond T.<> = I.FBLG
214 :     | fcond T.?= = I.FBUE
215 : george 545 | fcond fc = error("fcond "^T.Basis.fcondToString fc)
216 : monnier 245
217 : monnier 411 fun mark'(i,[]) = i
218 :     | mark'(i,a::an) = mark'(I.ANNOTATION{i=i,a=a},an)
219 : monnier 245
220 : monnier 411 fun mark(i,an) = emit(mark'(i,an))
221 : monnier 245
222 : monnier 411 (* convert an operand into a register *)
223 :     fun reduceOpn(I.REG r) = r
224 :     | reduceOpn(I.IMMED 0) = 0
225 :     | reduceOpn i =
226 :     let val d = newReg()
227 :     in emit(I.ARITH{a=I.OR,r=0,i=i,d=d}); d end
228 : monnier 245
229 : monnier 411 (* emit parallel copies *)
230 :     fun copy(dst,src,an) =
231 :     mark(I.COPY{dst=dst,src=src,impl=ref NONE,
232 :     tmp=case dst of [_] => NONE
233 :     | _ => SOME(I.Direct(newReg()))},an)
234 :     fun fcopy(dst,src,an) =
235 :     mark(I.FCOPY{dst=dst,src=src,impl=ref NONE,
236 :     tmp=case dst of [_] => NONE
237 :     | _ => SOME(I.FDirect(newFreg()))},an)
238 : monnier 245
239 : monnier 411 (* move register s to register d *)
240 :     fun move(s,d,an) =
241 :     if s = d orelse d = 0 then ()
242 :     else mark(I.COPY{dst=[d],src=[s],tmp=NONE,impl=ref NONE},an)
243 :    
244 :     (* move floating point register s to register d *)
245 :     fun fmoved(s,d,an) =
246 :     if s = d then ()
247 :     else mark(I.FCOPY{dst=[d],src=[s],tmp=NONE,impl=ref NONE},an)
248 : monnier 475 fun fmoves(s,d,an) = fmoved(s,d,an) (* error "fmoves" for now!!! XXX *)
249 : monnier 411 fun fmoveq(s,d,an) = error "fmoveq"
250 :    
251 :     (* load word constant *)
252 :     fun loadImmedw(w,d,cc,an) =
253 :     let val or = if cc <> REG then I.ORCC else I.OR
254 :     in if immed13w w then
255 :     mark(I.ARITH{a=or,r=0,i=I.IMMED(W.toIntX w),d=d},an)
256 :     else let val {hi,lo} = splitw w
257 :     in if lo = 0 then
258 :     (mark(I.SETHI{i=hi,d=d},an); genCmp0(cc,d))
259 :     else let val t = newReg()
260 :     in emit(I.SETHI{i=hi,d=t});
261 :     mark(I.ARITH{a=or,r=t,i=I.IMMED lo,d=d},an)
262 :     end
263 :     end
264 : monnier 245 end
265 :    
266 : monnier 411 (* load immediate *)
267 :     and loadImmed(n,d,cc,an) =
268 :     let val or = if cc <> REG then I.ORCC else I.OR
269 :     in if immed13 n then mark(I.ARITH{a=or,r=0,i=I.IMMED n,d=d},an)
270 :     else let val {hi,lo} = split n
271 :     in if lo = 0 then
272 :     (mark(I.SETHI{i=hi,d=d},an); genCmp0(cc,d))
273 :     else let val t = newReg()
274 :     in emit(I.SETHI{i=hi,d=t});
275 :     mark(I.ARITH{a=or,r=t,i=I.IMMED lo,d=d},an)
276 :     end
277 :     end
278 :     end
279 : monnier 245
280 : monnier 411 (* load label expression *)
281 :     and loadLabel(lab,d,cc,an) =
282 :     let val or = if cc <> REG then I.ORCC else I.OR
283 :     in mark(I.ARITH{a=or,r=0,i=I.LAB lab,d=d},an) end
284 : monnier 245
285 : monnier 411 (* emit an arithmetic op *)
286 :     and arith(a,acc,e1,e2,d,cc,comm,trap,an) =
287 :     let val (a,d) = case cc of
288 :     REG => (a,d)
289 :     | CC => (acc,0)
290 :     | CC_REG => (acc,d)
291 :     in case (opn e1,opn e2,comm) of
292 :     (i,I.REG r,COMMUTE)=> mark(I.ARITH{a=a,r=r,i=i,d=d},an)
293 :     | (I.REG r,i,_) => mark(I.ARITH{a=a,r=r,i=i,d=d},an)
294 :     | (r,i,_) => mark(I.ARITH{a=a,r=reduceOpn r,i=i,d=d},an)
295 :     ;
296 :     case trap of [] => () | _ => app emit trap
297 :     end
298 : monnier 245
299 : monnier 411 (* emit a shift op *)
300 :     and shift(s,e1,e2,d,cc,an) =
301 :     (mark(I.SHIFT{s=s,r=expr e1,i=opn e2,d=d},an);
302 :     genCmp0(cc,d)
303 :     )
304 : monnier 245
305 : monnier 411 (* emit externally defined multiply or division operation (V8) *)
306 :     and extarith(gen,genConst,e1,e2,d,cc,comm) =
307 :     let fun nonconst(e1,e2) =
308 :     case (opn e1,opn e2,comm) of
309 :     (i,I.REG r,COMMUTE) => gen({r=r,i=i,d=d},reduceOpn)
310 :     | (I.REG r,i,_) => gen({r=r,i=i,d=d},reduceOpn)
311 :     | (r,i,_) => gen({r=reduceOpn r,i=i,d=d},reduceOpn)
312 :     fun const(e,i) =
313 :     let val r = expr e
314 :     in genConst{r=r,i=i,d=d}
315 :     handle _ => gen({r=r,i=opn(T.LI i),d=d},reduceOpn)
316 :     end
317 :     fun constw(e,i) = const(e,Word32.toInt i)
318 :     handle _ => nonconst(e,T.LI32 i)
319 :     val instrs =
320 :     case (comm,e1,e2) of
321 :     (_,e1,T.LI i) => const(e1,i)
322 :     | (_,e1,T.LI32 i) => constw(e1,i)
323 :     | (COMMUTE,T.LI i,e2) => const(e2,i)
324 :     | (COMMUTE,T.LI32 i,e2) => constw(e2,i)
325 :     | _ => nonconst(e1,e2)
326 :     in app emit instrs;
327 :     genCmp0(cc,d)
328 :     end
329 : monnier 245
330 : monnier 411 (* emit 64-bit multiply or division operation (V9) *)
331 :     and muldiv64(a,genConst,e1,e2,d,cc,comm,an) =
332 :     let fun nonconst(e1,e2) =
333 :     [mark'(
334 :     case (opn e1,opn e2,comm) of
335 :     (i,I.REG r,COMMUTE) => I.ARITH{a=a,r=r,i=i,d=d}
336 :     | (I.REG r,i,_) => I.ARITH{a=a,r=r,i=i,d=d}
337 :     | (r,i,_) => I.ARITH{a=a,r=reduceOpn r,i=i,d=d},an)
338 :     ]
339 :     fun const(e,i) =
340 :     let val r = expr e
341 :     in genConst{r=r,i=i,d=d}
342 :     handle _ => [mark'(I.ARITH{a=a,r=r,i=opn(T.LI i),d=d},an)]
343 :     end
344 :     fun constw(e,i) = const(e,Word32.toInt i)
345 :     handle _ => nonconst(e,T.LI32 i)
346 :     val instrs =
347 :     case (comm,e1,e2) of
348 :     (_,e1,T.LI i) => const(e1,i)
349 :     | (_,e1,T.LI32 i) => constw(e1,i)
350 :     | (COMMUTE,T.LI i,e2) => const(e2,i)
351 :     | (COMMUTE,T.LI32 i,e2) => constw(e2,i)
352 :     | _ => nonconst(e1,e2)
353 :     in app emit instrs;
354 :     genCmp0(cc,d)
355 :     end
356 :    
357 :     (* divisions *)
358 : george 545 and divu32 x = Mulu32.divide{mode=T.TO_ZERO,stm=doStmt} x
359 : leunga 657 and divs32 x = Muls32.divide{mode=T.TO_ZERO,stm=doStmt} x
360 : george 545 and divt32 x = Mult32.divide{mode=T.TO_ZERO,stm=doStmt} x
361 :     and divu64 x = Mulu64.divide{mode=T.TO_ZERO,stm=doStmt} x
362 : leunga 657 and divs64 x = Muls64.divide{mode=T.TO_ZERO,stm=doStmt} x
363 : george 545 and divt64 x = Mult64.divide{mode=T.TO_ZERO,stm=doStmt} x
364 : monnier 411
365 : george 545 (*
366 :     and GOTO lab = T.JMP(T.LABEL(LE.LABEL lab),[],[])
367 :    
368 : monnier 411 and roundToZero{ty,r,i,d} =
369 :     let val L = Label.newLabel ""
370 :     in doStmt(T.MV(ty,d,T.REG(ty,r)));
371 : george 545 doStmt(T.IF(T.CMP(ty,T.GE,T.REG(ty,d),T.LI 0),GOTO L,T.SEQ []));
372 : monnier 411 doStmt(T.MV(ty,d,T.ADD(ty,T.REG(ty,d),T.LI i)));
373 :     defineLabel L
374 :     end
375 : george 545 *)
376 : monnier 411
377 :     (* emit an unary floating point op *)
378 :     and funary(a,e,d,an) = mark(I.FPop1{a=a,r=fexpr e,d=d},an)
379 :    
380 :     (* emit a binary floating point op *)
381 :     and farith(a,e1,e2,d,an) =
382 :     mark(I.FPop2{a=a,r1=fexpr e1,r2=fexpr e2,d=d},an)
383 :    
384 :     (* convert an expression into an addressing mode *)
385 :     and addr(T.ADD(_,e,T.LI n)) =
386 :     if immed13 n then (expr e,I.IMMED n)
387 :     else let val d = newReg()
388 :     in loadImmed(n,d,REG,[]); (d,opn e) end
389 : george 545 | addr(T.ADD(_,e,T.CONST c)) = (expr e,I.LAB(LE.CONST c))
390 : monnier 411 | addr(T.ADD(_,e,T.LABEL l)) = (expr e,I.LAB l)
391 :     | addr(T.ADD(ty,i as T.LI _,e)) = addr(T.ADD(ty,e,i))
392 : george 545 | addr(T.ADD(_,T.CONST c,e)) = (expr e,I.LAB(LE.CONST c))
393 : monnier 411 | addr(T.ADD(_,T.LABEL l,e)) = (expr e,I.LAB l)
394 :     | addr(T.ADD(_,e1,e2)) = (expr e1,I.REG(expr e2))
395 :     | addr(T.SUB(ty,e,T.LI n)) = addr(T.ADD(ty,e,T.LI(~n)))
396 :     | addr(T.LABEL l) = (0,I.LAB l)
397 :     | addr a = (expr a,zeroOpn)
398 :    
399 :     (* emit an integer load *)
400 :     and load(l,a,d,mem,cc,an) =
401 :     let val (r,i) = addr a
402 :     in mark(I.LOAD{l=l,r=r,i=i,d=d,mem=mem},an);
403 :     genCmp0(cc,d)
404 :     end
405 :    
406 :     (* emit an integer store *)
407 :     and store(s,a,d,mem,an) =
408 :     let val (r,i) = addr a
409 :     in mark(I.STORE{s=s,r=r,i=i,d=expr d,mem=mem},an) end
410 :    
411 :     (* emit a floating point load *)
412 :     and fload(l,a,d,mem,an) =
413 :     let val (r,i) = addr a
414 :     in mark(I.FLOAD{l=l,r=r,i=i,d=d,mem=mem},an) end
415 :    
416 :     (* emit a floating point store *)
417 :     and fstore(s,a,d,mem,an) =
418 :     let val (r,i) = addr a
419 :     in mark(I.FSTORE{s=s,r=r,i=i,d=fexpr d,mem=mem},an) end
420 :    
421 :     (* emit a jump *)
422 :     and jmp(a,labs,an) =
423 :     let val (r,i) = addr a
424 :     in mark(I.JMP{r=r,i=i,labs=labs,nop=true},an) end
425 :    
426 : george 545 (* convert mlrisc to cellset *)
427 :     and cellset mlrisc =
428 :     let fun g([],set) = set
429 :     | g(T.GPR(T.REG(_,r))::regs,set) = g(regs,C.addReg(r,set))
430 :     | g(T.FPR(T.FREG(_,f))::regs,set) = g(regs,C.addFreg(f,set))
431 :     | g(T.CCR(T.CC(_,65))::regs,set) = g(regs,C.addPSR(65,set))
432 :     | g(T.CCR(T.CC(_,cc))::regs,set) = g(regs,C.addReg(cc,set))
433 :     | g(_::regs, set) = g(regs,set)
434 :     in g(mlrisc, C.empty) end
435 :    
436 : monnier 411 (* emit a function call *)
437 : george 545 and call(a,flow,defs,uses,mem,an) =
438 : monnier 411 let val (r,i) = addr a
439 : george 545 val defs=cellset(defs)
440 :     val uses=cellset(uses)
441 : monnier 245 in case (r,i) of
442 :     (0,I.LAB(LE.LABEL l)) =>
443 : monnier 411 mark(I.CALL{label=l,defs=C.addReg(C.linkReg,defs),uses=uses,
444 :     mem=mem,nop=true},an)
445 :     | _ => mark(I.JMPL{r=r,i=i,d=C.linkReg,defs=defs,uses=uses,mem=mem,
446 :     nop=true},an)
447 : monnier 245 end
448 :    
449 : monnier 411 (* emit an integer branch instruction *)
450 : george 545 and branch(ctrl,T.CMP(ty,cond,a,b),lab,an) =
451 : monnier 411 let val (cond,a,b) =
452 :     case a of
453 :     (T.LI _ | T.LI32 _ | T.CONST _ | T.LABEL _) =>
454 : george 545 (T.Basis.swapCond cond,b,a)
455 : monnier 411 | _ => (cond,a,b)
456 :     in if V9 then
457 :     branchV9(cond,a,b,lab,an)
458 :     else
459 :     (doExpr(T.SUB(ty,a,b),newReg(),CC,[]); br(cond,lab,an))
460 :     end
461 : george 545 | branch(ctrl,T.CC(cond,65),lab,an) = br(cond,lab,an)
462 :     | branch(ctrl,T.CC(cond,r),lab,an) = (genCmp0(CC,r); br(cond,lab,an))
463 :     | branch(ctrl,T.FCMP(fty,cond,a,b),lab,an) =
464 :     let val cmp = case fty of
465 :     32 => I.FCMPs
466 :     | 64 => I.FCMPd
467 :     | _ => error "fbranch"
468 :     in emit(I.FCMP{cmp=cmp,r1=fexpr a,r2=fexpr b,nop=true});
469 :     mark(I.FBfcc{b=fcond cond,a=false,label=lab,nop=true},an)
470 :     end
471 : monnier 411 | branch _ = error "branch"
472 : monnier 245
473 : monnier 411 and branchV9(cond,a,b,lab,an) =
474 : leunga 624 let val size = Gen.Size.size a
475 : monnier 411 in if useBR andalso signedCmp cond then
476 :     let val r = newReg()
477 :     in doExpr(T.SUB(size,a,b),r,REG,[]);
478 :     brcond(cond,r,lab,an)
479 :     end
480 :     else
481 :     let val cc = case size of 32 => I.ICC
482 :     | 64 => I.XCC
483 :     | _ => error "branchV9"
484 :     in doExpr(T.SUB(size,a,b),newReg(),CC,[]);
485 :     bp(cond,cc,lab,an)
486 :     end
487 :     end
488 : monnier 245
489 : monnier 411 and br(c,lab,an) = mark(I.Bicc{b=cond c,a=true,label=lab,nop=true},an)
490 : monnier 245
491 : monnier 411 and brcond(c,r,lab,an) =
492 :     mark(I.BR{rcond=rcond c,r=r,p=I.PT,a=true,label=lab,nop=true},an)
493 : monnier 245
494 : monnier 411 and bp(c,cc,lab,an) =
495 :     mark(I.BP{b=cond c,cc=cc,p=I.PT,a=true,label=lab,nop=true},an)
496 : monnier 245
497 : monnier 411 (* generate code for a statement *)
498 :     and stmt(T.MV(_,d,e),an) = doExpr(e,d,REG,an)
499 :     | stmt(T.FMV(_,d,e),an) = doFexpr(e,d,an)
500 :     | stmt(T.CCMV(d,e),an) = doCCexpr(e,d,an)
501 :     | stmt(T.COPY(_,dst,src),an) = copy(dst,src,an)
502 : monnier 475 | stmt(T.FCOPY(_,dst,src),an) = fcopy(dst,src,an)
503 : george 545 | stmt(T.JMP(ctrl,T.LABEL(LE.LABEL l),_),an) =
504 : monnier 411 mark(I.Bicc{b=I.BA,a=true,label=l,nop=false},an)
505 : george 545 | stmt(T.JMP(ctrl,e,labs),an) = jmp(e,labs,an)
506 : leunga 591 | stmt(T.CALL{funct,targets,defs,uses,cdefs,cuses,region},an) =
507 :     call(funct,targets,defs,uses,region,an)
508 : george 545 | stmt(T.RET _,an) = mark(I.RET{leaf=not registerwindow,nop=true},an)
509 : monnier 411 | stmt(T.STORE(8,a,d,mem),an) = store(I.STB,a,d,mem,an)
510 :     | stmt(T.STORE(16,a,d,mem),an) = store(I.STH,a,d,mem,an)
511 :     | stmt(T.STORE(32,a,d,mem),an) = store(I.ST,a,d,mem,an)
512 :     | stmt(T.STORE(64,a,d,mem),an) =
513 :     store(if V9 then I.STX else I.STD,a,d,mem,an)
514 :     | stmt(T.FSTORE(32,a,d,mem),an) = fstore(I.STF,a,d,mem,an)
515 :     | stmt(T.FSTORE(64,a,d,mem),an) = fstore(I.STDF,a,d,mem,an)
516 : george 545 | stmt(T.BCC(ctrl,cc,lab),an) = branch(ctrl,cc,lab,an)
517 :     | stmt(T.DEFINE l,_) = defineLabel l
518 : monnier 411 | stmt(T.ANNOTATION(s,a),an) = stmt(s,a::an)
519 : george 555 | stmt(T.EXT s,an) = ExtensionComp.compileSext(reducer()) {stm=s, an=an}
520 : george 545 | stmt(s,an) = doStmts(Gen.compileStm s)
521 : monnier 245
522 : monnier 411 and doStmt s = stmt(s,[])
523 : monnier 245
524 : george 545 and doStmts ss = app doStmt ss
525 : monnier 245
526 : monnier 411 (* convert an expression into a register *)
527 :     and expr(T.REG(_,r)) = r
528 :     | expr(T.LI 0) = 0
529 :     | expr(T.LI32 0w0) = 0
530 :     | expr e = let val d = newReg()
531 :     in doExpr(e,d,REG,[]); d end
532 : monnier 245
533 : monnier 411 (* compute an integer expression and put the result in register d
534 :     * If cc is set then set the condition code with the result.
535 :     *)
536 :     and doExpr(e,d,cc,an) =
537 :     case e of
538 :     T.REG(_,r) => (move(r,d,an); genCmp0(cc,r))
539 :     | T.LI n => loadImmed(n,d,cc,an)
540 :     | T.LI32 w => loadImmedw(w,d,cc,an)
541 :     | T.LABEL l => loadLabel(l,d,cc,an)
542 : george 545 | T.CONST c => loadLabel(LE.CONST c,d,cc,an)
543 : monnier 245
544 : monnier 411 (* generic 32/64 bit support *)
545 :     | T.ADD(_,a,b) => arith(I.ADD,I.ADDCC,a,b,d,cc,COMMUTE,[],an)
546 :     | T.SUB(_,a,T.LI 0) => doExpr(a,d,cc,an)
547 :     | T.SUB(_,a,T.LI32 0w0) => doExpr(a,d,cc,an)
548 :     | T.SUB(_,a,b) => arith(I.SUB,I.SUBCC,a,b,d,cc,NOCOMMUTE,[],an)
549 :    
550 :     | T.ANDB(_,a,T.NOTB(_,b)) =>
551 :     arith(I.ANDN,I.ANDNCC,a,b,d,cc,NOCOMMUTE,[],an)
552 :     | T.ORB(_,a,T.NOTB(_,b)) =>
553 :     arith(I.ORN,I.ORNCC,a,b,d,cc,NOCOMMUTE,[],an)
554 :     | T.XORB(_,a,T.NOTB(_,b)) =>
555 :     arith(I.XNOR,I.XNORCC,a,b,d,cc,COMMUTE,[],an)
556 :     | T.ANDB(_,T.NOTB(_,a),b) =>
557 :     arith(I.ANDN,I.ANDNCC,b,a,d,cc,NOCOMMUTE,[],an)
558 :     | T.ORB(_,T.NOTB(_,a),b) =>
559 :     arith(I.ORN,I.ORNCC,b,a,d,cc,NOCOMMUTE,[],an)
560 :     | T.XORB(_,T.NOTB(_,a),b) =>
561 :     arith(I.XNOR,I.XNORCC,b,a,d,cc,COMMUTE,[],an)
562 :     | T.NOTB(_,T.XORB(_,a,b)) =>
563 :     arith(I.XNOR,I.XNORCC,a,b,d,cc,COMMUTE,[],an)
564 : monnier 245
565 : monnier 411 | T.ANDB(_,a,b) => arith(I.AND,I.ANDCC,a,b,d,cc,COMMUTE,[],an)
566 :     | T.ORB(_,a,b) => arith(I.OR,I.ORCC,a,b,d,cc,COMMUTE,[],an)
567 :     | T.XORB(_,a,b) => arith(I.XOR,I.XORCC,a,b,d,cc,COMMUTE,[],an)
568 :     | T.NOTB(_,a) => arith(I.XNOR,I.XNORCC,a,T.LI 0,d,cc,COMMUTE,[],an)
569 : monnier 245
570 : monnier 411 (* 32 bit support *)
571 :     | T.SRA(32,a,b) => shift(I.SRA,a,b,d,cc,an)
572 :     | T.SRL(32,a,b) => shift(I.SRL,a,b,d,cc,an)
573 :     | T.SLL(32,a,b) => shift(I.SLL,a,b,d,cc,an)
574 :     | T.ADDT(32,a,b)=>
575 :     arith(I.ADDCC,I.ADDCC,a,b,d,CC_REG,COMMUTE,trap32,an)
576 :     | T.SUBT(32,a,b)=>
577 :     arith(I.SUBCC,I.SUBCC,a,b,d,CC_REG,NOCOMMUTE,trap32,an)
578 : leunga 657 | T.MULU(32,a,b) => extarith(P.umul32,
579 :     Mulu32.multiply,a,b,d,cc,COMMUTE)
580 :     | T.MULS(32,a,b) => extarith(P.smul32,
581 :     Muls32.multiply,a,b,d,cc,COMMUTE)
582 :     | T.MULT(32,a,b) => extarith(P.smul32trap,
583 :     Mult32.multiply,a,b,d,cc,COMMUTE)
584 :     | T.DIVU(32,a,b) => extarith(P.udiv32,divu32,a,b,d,cc,NOCOMMUTE)
585 :     | T.DIVS(32,a,b) => extarith(P.sdiv32,divs32,a,b,d,cc,NOCOMMUTE)
586 :     | T.DIVT(32,a,b) => extarith(P.sdiv32trap,divt32,a,b,d,cc,NOCOMMUTE)
587 : monnier 245
588 : monnier 411 (* 64 bit support *)
589 :     | T.SRA(64,a,b) => shift(I.SRAX,a,b,d,cc,an)
590 :     | T.SRL(64,a,b) => shift(I.SRLX,a,b,d,cc,an)
591 :     | T.SLL(64,a,b) => shift(I.SLLX,a,b,d,cc,an)
592 :     | T.ADDT(64,a,b)=>
593 :     arith(I.ADDCC,I.ADDCC,a,b,d,CC_REG,COMMUTE,trap64,an)
594 :     | T.SUBT(64,a,b)=>
595 :     arith(I.SUBCC,I.SUBCC,a,b,d,CC_REG,NOCOMMUTE,trap64,an)
596 :     | T.MULU(64,a,b) =>
597 :     muldiv64(I.MULX,Mulu64.multiply,a,b,d,cc,COMMUTE,an)
598 : leunga 657 | T.MULS(64,a,b) =>
599 :     muldiv64(I.MULX,Muls64.multiply,a,b,d,cc,COMMUTE,an)
600 : monnier 411 | T.MULT(64,a,b) =>
601 :     (muldiv64(I.MULX,Mult64.multiply,a,b,d,CC_REG,COMMUTE,an);
602 :     app emit trap64)
603 :     | T.DIVU(64,a,b) => muldiv64(I.UDIVX,divu64,a,b,d,cc,NOCOMMUTE,an)
604 : leunga 657 | T.DIVS(64,a,b) => muldiv64(I.SDIVX,divs64,a,b,d,cc,NOCOMMUTE,an)
605 : monnier 411 | T.DIVT(64,a,b) => muldiv64(I.SDIVX,divt64,a,b,d,cc,NOCOMMUTE,an)
606 : monnier 245
607 : monnier 411 (* loads *)
608 :     | T.LOAD(8,a,mem) => load(I.LDUB,a,d,mem,cc,an)
609 : george 545 | T.CVTI2I(_,T.SIGN_EXTEND,_,T.LOAD(8,a,mem)) =>
610 :     load(I.LDSB,a,d,mem,cc,an)
611 : monnier 411 | T.LOAD(16,a,mem) => load(I.LDUH,a,d,mem,cc,an)
612 : george 545 | T.CVTI2I(_,T.SIGN_EXTEND,_,T.LOAD(16,a,mem)) =>
613 : monnier 411 load(I.LDSH,a,d,mem,cc,an)
614 :     | T.LOAD(32,a,mem) => load(I.LD,a,d,mem,cc,an)
615 : george 545 | T.LOAD(64,a,mem) =>
616 :     load(if V9 then I.LDX else I.LDD,a,d,mem,cc,an)
617 : monnier 245
618 : monnier 411 (* conditional expression *)
619 : george 545 | T.COND exp => doStmts (Gen.compileCond{exp=exp,rd=d,an=an})
620 : monnier 411
621 :     (* misc *)
622 : george 545 | T.LET(s,e) => (doStmt s; doExpr(e, d, cc, an))
623 :     | T.MARK(e,A.MARKREG f) => (f d; doExpr(e,d,cc,an))
624 :     | T.MARK(e,a) => doExpr(e,d,cc,a::an)
625 :     | T.PRED(e,c) => doExpr(e,d,cc,A.CTRLUSE c::an)
626 : george 555 | T.REXT e => ExtensionComp.compileRext (reducer()) {e=e, rd=d, an=an}
627 : george 545 | e => doExpr(Gen.compileRexp e,d,cc,an)
628 : monnier 411
629 :     (* generate a comparison with zero *)
630 :     and genCmp0(REG,_) = ()
631 :     | genCmp0(_,d) = emit(I.ARITH{a=I.SUBCC,r=d,i=zeroOpn,d=0})
632 :    
633 :     (* convert an expression into a floating point register *)
634 :     and fexpr(T.FREG(_,r)) = r
635 :     | fexpr e = let val d = newFreg() in doFexpr(e,d,[]); d end
636 :    
637 :     (* compute a floating point expression and put the result in d *)
638 :     and doFexpr(e,d,an) =
639 :     case e of
640 :     (* single precision *)
641 :     T.FREG(32,r) => fmoves(r,d,an)
642 :     | T.FLOAD(32,ea,mem) => fload(I.LDF,ea,d,mem,an)
643 :     | T.FADD(32,a,b) => farith(I.FADDs,a,b,d,an)
644 :     | T.FSUB(32,a,b) => farith(I.FSUBs,a,b,d,an)
645 :     | T.FMUL(32,a,b) => farith(I.FMULs,a,b,d,an)
646 :     | T.FDIV(32,a,b) => farith(I.FDIVs,a,b,d,an)
647 :     | T.FABS(32,a) => funary(I.FABSs,a,d,an)
648 :     | T.FNEG(32,a) => funary(I.FNEGs,a,d,an)
649 :     | T.FSQRT(32,a) => funary(I.FSQRTs,a,d,an)
650 :    
651 :     (* double precision *)
652 :     | T.FREG(64,r) => fmoved(r,d,an)
653 :     | T.FLOAD(64,ea,mem) => fload(I.LDDF,ea,d,mem,an)
654 :     | T.FADD(64,a,b) => farith(I.FADDd,a,b,d,an)
655 :     | T.FSUB(64,a,b) => farith(I.FSUBd,a,b,d,an)
656 :     | T.FMUL(64,a,b) => farith(I.FMULd,a,b,d,an)
657 :     | T.FDIV(64,a,b) => farith(I.FDIVd,a,b,d,an)
658 :     | T.FABS(64,a) => funary(I.FABSd,a,d,an)
659 :     | T.FNEG(64,a) => funary(I.FNEGd,a,d,an)
660 :     | T.FSQRT(64,a) => funary(I.FSQRTd,a,d,an)
661 :    
662 :     (* quad precision *)
663 :     | T.FREG(128,r) => fmoveq(r,d,an)
664 :     | T.FADD(128,a,b) => farith(I.FADDq,a,b,d,an)
665 :     | T.FSUB(128,a,b) => farith(I.FSUBq,a,b,d,an)
666 :     | T.FMUL(128,a,b) => farith(I.FMULq,a,b,d,an)
667 :     | T.FDIV(128,a,b) => farith(I.FDIVq,a,b,d,an)
668 :     | T.FABS(128,a) => funary(I.FABSq,a,d,an)
669 :     | T.FNEG(128,a) => funary(I.FNEGq,a,d,an)
670 :     | T.FSQRT(128,a) => funary(I.FSQRTq,a,d,an)
671 :    
672 :     (* floating point to floating point *)
673 : george 545 | T.CVTF2F(ty,ty',e) =>
674 : monnier 475 (case (ty,ty') of
675 :     (32,32) => doFexpr(e,d,an)
676 :     | (64,32) => funary(I.FsTOd,e,d,an)
677 : monnier 411 | (128,32) => funary(I.FsTOq,e,d,an)
678 : monnier 475 | (32,64) => funary(I.FdTOs,e,d,an)
679 :     | (64,64) => doFexpr(e,d,an)
680 : monnier 411 | (128,64) => funary(I.FdTOq,e,d,an)
681 :     | (32,128) => funary(I.FqTOs,e,d,an)
682 :     | (64,128) => funary(I.FqTOd,e,d,an)
683 :     | (128,128) => doFexpr(e,d,an)
684 :     | _ => error "CVTF2F"
685 :     )
686 :    
687 :     (* integer to floating point *)
688 : george 545 | T.CVTI2F(32,32,e) => app emit (P.cvti2s({i=opn e,d=d},reduceOpn))
689 :     | T.CVTI2F(64,32,e) => app emit (P.cvti2d({i=opn e,d=d},reduceOpn))
690 :     | T.CVTI2F(128,32,e) => app emit (P.cvti2q({i=opn e,d=d},reduceOpn))
691 : monnier 411
692 : george 545 | T.FMARK(e,A.MARKREG f) => (f d; doFexpr(e,d,an))
693 :     | T.FMARK(e,a) => doFexpr(e,d,a::an)
694 :     | T.FPRED(e,c) => doFexpr(e,d,A.CTRLUSE c::an)
695 : george 555 | T.FEXT e => ExtensionComp.compileFext (reducer()) {e=e, fd=d, an=an}
696 : george 545 | e => doFexpr(Gen.compileFexp e,d,an)
697 : monnier 411
698 :     and doCCexpr(T.CMP(ty,cond,e1,e2),65,an) =
699 :     doExpr(T.SUB(ty,e1,e2),newReg(),CC,an)
700 :     | doCCexpr(T.CMP _,d,an) = error "doCCexpr"
701 :     | doCCexpr(_,65,an) = error "doCCexpr"
702 : george 545 | doCCexpr(T.CC(_,65),d,an) = error "doCCexpr"
703 :     | doCCexpr(T.CC(_,r),d,an) = move(r,d,an)
704 :     | doCCexpr(T.CCMARK(e,A.MARKREG f),d,an) = (f d; doCCexpr(e,d,an))
705 :     | doCCexpr(T.CCMARK(e,a),d,an) = doCCexpr(e,d,a::an)
706 :     | doCCexpr(T.CCEXT e,d,an) =
707 : george 555 ExtensionComp.compileCCext (reducer()) {e=e, ccd=d, an=an}
708 : monnier 411 | doCCexpr e = error "doCCexpr"
709 :    
710 :     and ccExpr e = let val d = newReg() in doCCexpr(e,d,[]); d end
711 :    
712 :     (* convert an expression into an operand *)
713 :     and opn(T.LI 0) = zeroOpn
714 :     | opn(T.LI32 0w0) = zeroOpn
715 : george 545 | opn(T.CONST c) = I.LAB(LE.CONST c)
716 : monnier 411 | opn(T.LABEL l) = I.LAB l
717 :     | opn(e as T.LI n) = if immed13 n then I.IMMED n else I.REG(expr e)
718 :     | opn(e as T.LI32 n) =
719 :     if immed13w n then I.IMMED(W.toIntX n) else I.REG(expr e)
720 :     | opn e = I.REG(expr e)
721 :    
722 : george 545 and reducer() =
723 :     T.REDUCER{reduceRexp = expr,
724 :     reduceFexp = fexpr,
725 :     reduceCCexp = ccExpr,
726 :     reduceStm = stmt,
727 :     operand = opn,
728 :     reduceOperand = reduceOpn,
729 :     addressOf = addr,
730 :     emit = mark,
731 :     instrStream = instrStream,
732 :     mltreeStream = self()
733 :     }
734 :     and self() =
735 :     S.STREAM
736 :     { beginCluster= beginCluster,
737 :     endCluster = endCluster,
738 :     emit = doStmt,
739 :     pseudoOp = pseudoOp,
740 :     defineLabel = defineLabel,
741 :     entryLabel = entryLabel,
742 :     comment = comment,
743 :     annotation = annotation,
744 :     exitBlock = fn regs => exitBlock(cellset regs),
745 :     alias = alias,
746 :     phi = phi
747 :     }
748 :     in self()
749 : monnier 245 end
750 :    
751 :     end
752 :    
753 : monnier 411 (*
754 :     * Machine code generator for SPARC.
755 : monnier 245 *
756 : monnier 411 * The SPARC architecture has 32 general purpose registers (%g0 is always 0)
757 :     * and 32 single precision floating point registers.
758 : monnier 245 *
759 : monnier 411 * Some Ugliness: double precision floating point registers are
760 :     * register pairs. There are no double precision moves, negation and absolute
761 :     * values. These require two single precision operations. I've created
762 :     * composite instructions FMOVd, FNEGd and FABSd to stand for these.
763 : monnier 245 *
764 : monnier 411 * All integer arithmetic instructions can optionally set the condition
765 :     * code register. We use this to simplify certain comparisons with zero.
766 : monnier 245 *
767 : monnier 411 * Integer multiplication, division and conversion from integer to floating
768 :     * go thru the pseudo instruction interface, since older sparcs do not
769 :     * implement these instructions in hardware.
770 : monnier 245 *
771 : monnier 411 * In addition, the trap instruction for detecting overflow is a parameter.
772 :     * This allows different trap vectors to be used.
773 : monnier 245 *
774 : monnier 411 * -- Allen
775 :     *)

root@smlnj-gforge.cs.uchicago.edu
ViewVC Help
Powered by ViewVC 1.0.0