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[smlnj] Annotation of /sml/trunk/src/MLRISC/sparc/mltree/sparc.sml
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Annotation of /sml/trunk/src/MLRISC/sparc/mltree/sparc.sml

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1 : monnier 245 (*
2 : monnier 411 * This is a new instruction selection module for Sparc,
3 :     * using the new instruction representation and the new MLTREE representation.
4 :     * Support for V9 has been added.
5 : monnier 245 *
6 : monnier 411 * The cc bit in arithmetic op are now embedded within the arithmetic
7 :     * opcode. This should save some space.
8 : monnier 245 *
9 : monnier 411 * -- Allen
10 : monnier 245 *)
11 :    
12 :     functor Sparc
13 :     (structure SparcInstr : SPARCINSTR
14 : monnier 411 structure PseudoInstrs : SPARC_PSEUDO_INSTR
15 : george 555 structure ExtensionComp : MLTREE_EXTENSION_COMP
16 : leunga 775 where I = SparcInstr
17 : monnier 475 sharing PseudoInstrs.I = SparcInstr
18 : monnier 411 (*
19 :     * The client should also specify these parameters.
20 :     * These are the estimated cost of these instructions.
21 :     * The code generator will use alternative sequences that are
22 :     * cheaper when their costs are lower.
23 :     *)
24 : george 545 val muluCost : int ref (* cost of unsigned multiplication in cycles *)
25 : monnier 411 val divuCost : int ref (* cost of unsigned division in cycles *)
26 :     val multCost : int ref (* cost of trapping/signed multiplication in cycles *)
27 :     val divtCost : int ref (* cost of trapping/signed division in cycles *)
28 :    
29 :     (*
30 :     * If you don't want to use register windows at all, set this to false.
31 :     *)
32 :     val registerwindow : bool ref (* should we use register windows? *)
33 :    
34 :     val V9 : bool (* should we use V9 instruction set? *)
35 :     val useBR : bool ref
36 :     (* should we use the BR instruction (when in V9)?
37 :     * I think it is a good idea to use it.
38 :     *)
39 : monnier 245 ) : MLTREECOMP =
40 :     struct
41 : leunga 775 structure I = SparcInstr
42 :     structure T = I.T
43 : monnier 429 structure S = T.Stream
44 : leunga 775 structure R = T.Region
45 : monnier 411 structure C = I.C
46 : george 545 structure LE = I.LabelExp
47 : monnier 245 structure W = Word32
48 :     structure P = PseudoInstrs
49 : george 545 structure A = MLRiscAnnotations
50 : monnier 245
51 : leunga 744 type instrStream = (I.instruction,C.cellset) T.stream
52 :     type mltreeStream = (T.stm,T.mlrisc list) T.stream
53 : george 545
54 : george 761 val int_0 = T.I.int_0
55 :     fun toInt n = T.I.toInt(32, n)
56 :     fun LI i = T.LI(T.I.fromInt(32, i))
57 :     fun LT (n,m) = T.I.LT(32, n, m)
58 :     fun LE (n,m) = T.I.LE(32, n, m)
59 :    
60 : leunga 624 val intTy = if V9 then 64 else 32
61 : monnier 411 structure Gen = MLTreeGen(structure T = T
62 : leunga 624 val intTy = intTy
63 : monnier 411 val naturalWidths = if V9 then [32,64] else [32]
64 : monnier 429 datatype rep = SE | ZE | NEITHER
65 :     val rep = NEITHER
66 : monnier 411 )
67 : monnier 245
68 : monnier 411 functor Multiply32 = MLTreeMult
69 :     (structure I = I
70 :     structure T = T
71 : monnier 429 type arg = {r1:C.cell,r2:C.cell,d:C.cell}
72 :     type argi = {r:C.cell,i:int,d:C.cell}
73 : monnier 411
74 :     val intTy = 32
75 :     fun mov{r,d} = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
76 :     fun add{r1,r2,d} = I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}
77 :     fun slli{r,i,d} = [I.SHIFT{s=I.SLL,r=r,i=I.IMMED i,d=d}]
78 :     fun srli{r,i,d} = [I.SHIFT{s=I.SRL,r=r,i=I.IMMED i,d=d}]
79 :     fun srai{r,i,d} = [I.SHIFT{s=I.SRA,r=r,i=I.IMMED i,d=d}]
80 :     )
81 : monnier 245
82 : monnier 411 functor Multiply64 = MLTreeMult
83 :     (structure I = I
84 :     structure T = T
85 : monnier 429 type arg = {r1:C.cell,r2:C.cell,d:C.cell}
86 :     type argi = {r:C.cell,i:int,d:C.cell}
87 : monnier 411
88 :     val intTy = 64
89 :     fun mov{r,d} = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
90 :     fun add{r1,r2,d} = I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}
91 :     fun slli{r,i,d} = [I.SHIFT{s=I.SLLX,r=r,i=I.IMMED i,d=d}]
92 :     fun srli{r,i,d} = [I.SHIFT{s=I.SRLX,r=r,i=I.IMMED i,d=d}]
93 :     fun srai{r,i,d} = [I.SHIFT{s=I.SRAX,r=r,i=I.IMMED i,d=d}]
94 :     )
95 : monnier 245
96 : monnier 411 (* signed, trapping version of multiply and divide *)
97 :     structure Mult32 = Multiply32
98 :     (val trapping = true
99 :     val multCost = multCost
100 :     fun addv{r1,r2,d} =
101 :     I.ARITH{a=I.ADDCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap32
102 :     fun subv{r1,r2,d} =
103 :     I.ARITH{a=I.SUBCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap32
104 :     val sh1addv = NONE
105 :     val sh2addv = NONE
106 :     val sh3addv = NONE
107 :     )
108 : monnier 429 (val signed = true)
109 : monnier 245
110 : monnier 411 (* unsigned, non-trapping version of multiply and divide *)
111 : leunga 657 functor Mul32 = Multiply32
112 : monnier 411 (val trapping = false
113 :     val multCost = muluCost
114 :     fun addv{r1,r2,d} = [I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}]
115 :     fun subv{r1,r2,d} = [I.ARITH{a=I.SUB,r=r1,i=I.REG r2,d=d}]
116 :     val sh1addv = NONE
117 :     val sh2addv = NONE
118 :     val sh3addv = NONE
119 :     )
120 : leunga 657 structure Mulu32 = Mul32(val signed = false)
121 : monnier 245
122 : leunga 657 structure Muls32 = Mul32(val signed = true)
123 :    
124 : monnier 411 (* signed, trapping version of multiply and divide *)
125 :     structure Mult64 = Multiply64
126 :     (val trapping = true
127 :     val multCost = multCost
128 :     fun addv{r1,r2,d} =
129 :     I.ARITH{a=I.ADDCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap64
130 :     fun subv{r1,r2,d} =
131 :     I.ARITH{a=I.SUBCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap64
132 :     val sh1addv = NONE
133 :     val sh2addv = NONE
134 :     val sh3addv = NONE
135 :     )
136 : monnier 429 (val signed = true)
137 : monnier 245
138 : monnier 411 (* unsigned, non-trapping version of multiply and divide *)
139 : leunga 657 functor Mul64 = Multiply64
140 : monnier 411 (val trapping = false
141 :     val multCost = muluCost
142 :     fun addv{r1,r2,d} = [I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}]
143 :     fun subv{r1,r2,d} = [I.ARITH{a=I.SUB,r=r1,i=I.REG r2,d=d}]
144 :     val sh1addv = NONE
145 :     val sh2addv = NONE
146 :     val sh3addv = NONE
147 :     )
148 : leunga 657 structure Mulu64 = Mul64(val signed = false)
149 : monnier 245
150 : leunga 657 structure Muls64 = Mul64(val signed = true)
151 :    
152 : monnier 411 datatype commutative = COMMUTE | NOCOMMUTE
153 :     datatype cc = REG (* write to register *)
154 :     | CC (* set condition code *)
155 :     | CC_REG (* do both *)
156 : monnier 245
157 : monnier 411 fun error msg = MLRiscErrorMsg.error("Sparc",msg)
158 : monnier 245
159 : leunga 744
160 :    
161 : monnier 411 fun selectInstructions
162 : george 545 (instrStream as
163 : leunga 815 S.STREAM{emit,defineLabel,entryLabel,pseudoOp,annotation,getAnnotations,
164 : leunga 744 beginCluster,endCluster,exitBlock,comment,...}) =
165 : monnier 411 let
166 :     (* Flags *)
167 :     val useBR = !useBR
168 :     val registerwindow = !registerwindow
169 : monnier 245
170 : leunga 744 val trap32 = PseudoInstrs.overflowtrap32
171 :     val trap64 = PseudoInstrs.overflowtrap64
172 :     val zeroR = C.r0
173 :     val newReg = C.newReg
174 : monnier 411 val newFreg = C.newFreg
175 : george 761 val int_m4096 = T.I.fromInt(32, ~4096)
176 :     val int_4096 = T.I.fromInt(32, 4096)
177 :     fun immed13 n = LE(int_m4096, n) andalso LT(n, int_4096)
178 : monnier 411 fun immed13w w = let val x = W.~>>(w,0w12)
179 :     in x = 0w0 orelse (W.notb x) = 0w0 end
180 :     fun splitw w = {hi=W.toInt(W.>>(w,0w10)),lo=W.toInt(W.andb(w,0wx3ff))}
181 : george 761 fun split n = splitw(T.I.toWord32(32, n))
182 : monnier 245
183 : monnier 411
184 : leunga 744 val zeroOpn = I.REG zeroR (* zero value operand *)
185 : monnier 245
186 : monnier 411 fun cond T.LT = I.BL
187 :     | cond T.LTU = I.BCS
188 :     | cond T.LE = I.BLE
189 :     | cond T.LEU = I.BLEU
190 :     | cond T.EQ = I.BE
191 :     | cond T.NE = I.BNE
192 :     | cond T.GE = I.BGE
193 :     | cond T.GEU = I.BCC
194 :     | cond T.GT = I.BG
195 :     | cond T.GTU = I.BGU
196 : leunga 744 | cond _ = error "cond"
197 : monnier 245
198 : monnier 411 fun rcond T.LT = I.RLZ
199 :     | rcond T.LE = I.RLEZ
200 :     | rcond T.EQ = I.RZ
201 :     | rcond T.NE = I.RNZ
202 :     | rcond T.GE = I.RGEZ
203 :     | rcond T.GT = I.RGZ
204 :     | rcond _ = error "rcond"
205 : monnier 245
206 : monnier 411 fun signedCmp(T.LT | T.LE | T.EQ | T.NE | T.GE | T.GT) = true
207 :     | signedCmp _ = false
208 : monnier 245
209 : monnier 411 fun fcond T.== = I.FBE
210 :     | fcond T.?<> = I.FBNE
211 :     | fcond T.? = I.FBU
212 :     | fcond T.<=> = I.FBO
213 :     | fcond T.> = I.FBG
214 :     | fcond T.>= = I.FBGE
215 :     | fcond T.?> = I.FBUG
216 :     | fcond T.?>= = I.FBUGE
217 :     | fcond T.< = I.FBL
218 :     | fcond T.<= = I.FBLE
219 :     | fcond T.?< = I.FBUL
220 :     | fcond T.?<= = I.FBULE
221 :     | fcond T.<> = I.FBLG
222 :     | fcond T.?= = I.FBUE
223 : george 545 | fcond fc = error("fcond "^T.Basis.fcondToString fc)
224 : monnier 245
225 : monnier 411 fun mark'(i,[]) = i
226 :     | mark'(i,a::an) = mark'(I.ANNOTATION{i=i,a=a},an)
227 : monnier 245
228 : monnier 411 fun mark(i,an) = emit(mark'(i,an))
229 : monnier 245
230 : monnier 411 (* convert an operand into a register *)
231 :     fun reduceOpn(I.REG r) = r
232 : leunga 744 | reduceOpn(I.IMMED 0) = zeroR
233 : monnier 411 | reduceOpn i =
234 :     let val d = newReg()
235 : leunga 744 in emit(I.ARITH{a=I.OR,r=zeroR,i=i,d=d}); d end
236 : monnier 245
237 : monnier 411 (* emit parallel copies *)
238 :     fun copy(dst,src,an) =
239 :     mark(I.COPY{dst=dst,src=src,impl=ref NONE,
240 :     tmp=case dst of [_] => NONE
241 :     | _ => SOME(I.Direct(newReg()))},an)
242 :     fun fcopy(dst,src,an) =
243 :     mark(I.FCOPY{dst=dst,src=src,impl=ref NONE,
244 :     tmp=case dst of [_] => NONE
245 :     | _ => SOME(I.FDirect(newFreg()))},an)
246 : monnier 245
247 : monnier 411 (* move register s to register d *)
248 :     fun move(s,d,an) =
249 : leunga 744 if C.sameColor(s,d) orelse C.registerId d = 0 then ()
250 : monnier 411 else mark(I.COPY{dst=[d],src=[s],tmp=NONE,impl=ref NONE},an)
251 :    
252 :     (* move floating point register s to register d *)
253 :     fun fmoved(s,d,an) =
254 : leunga 744 if C.sameColor(s,d) then ()
255 : monnier 411 else mark(I.FCOPY{dst=[d],src=[s],tmp=NONE,impl=ref NONE},an)
256 : monnier 475 fun fmoves(s,d,an) = fmoved(s,d,an) (* error "fmoves" for now!!! XXX *)
257 : monnier 411 fun fmoveq(s,d,an) = error "fmoveq"
258 :    
259 :     (* load immediate *)
260 :     and loadImmed(n,d,cc,an) =
261 :     let val or = if cc <> REG then I.ORCC else I.OR
262 : george 761 in if immed13 n then mark(I.ARITH{a=or,r=zeroR,i=I.IMMED(toInt n),d=d},an)
263 : monnier 411 else let val {hi,lo} = split n
264 :     in if lo = 0 then
265 :     (mark(I.SETHI{i=hi,d=d},an); genCmp0(cc,d))
266 :     else let val t = newReg()
267 :     in emit(I.SETHI{i=hi,d=t});
268 :     mark(I.ARITH{a=or,r=t,i=I.IMMED lo,d=d},an)
269 :     end
270 :     end
271 :     end
272 : monnier 245
273 : monnier 411 (* load label expression *)
274 :     and loadLabel(lab,d,cc,an) =
275 :     let val or = if cc <> REG then I.ORCC else I.OR
276 : leunga 744 in mark(I.ARITH{a=or,r=zeroR,i=I.LAB lab,d=d},an) end
277 : monnier 245
278 : monnier 411 (* emit an arithmetic op *)
279 :     and arith(a,acc,e1,e2,d,cc,comm,trap,an) =
280 :     let val (a,d) = case cc of
281 :     REG => (a,d)
282 : leunga 744 | CC => (acc,zeroR)
283 : monnier 411 | CC_REG => (acc,d)
284 :     in case (opn e1,opn e2,comm) of
285 :     (i,I.REG r,COMMUTE)=> mark(I.ARITH{a=a,r=r,i=i,d=d},an)
286 :     | (I.REG r,i,_) => mark(I.ARITH{a=a,r=r,i=i,d=d},an)
287 :     | (r,i,_) => mark(I.ARITH{a=a,r=reduceOpn r,i=i,d=d},an)
288 :     ;
289 :     case trap of [] => () | _ => app emit trap
290 :     end
291 : monnier 245
292 : monnier 411 (* emit a shift op *)
293 :     and shift(s,e1,e2,d,cc,an) =
294 :     (mark(I.SHIFT{s=s,r=expr e1,i=opn e2,d=d},an);
295 :     genCmp0(cc,d)
296 :     )
297 : monnier 245
298 : monnier 411 (* emit externally defined multiply or division operation (V8) *)
299 :     and extarith(gen,genConst,e1,e2,d,cc,comm) =
300 :     let fun nonconst(e1,e2) =
301 :     case (opn e1,opn e2,comm) of
302 :     (i,I.REG r,COMMUTE) => gen({r=r,i=i,d=d},reduceOpn)
303 :     | (I.REG r,i,_) => gen({r=r,i=i,d=d},reduceOpn)
304 :     | (r,i,_) => gen({r=reduceOpn r,i=i,d=d},reduceOpn)
305 :     fun const(e,i) =
306 :     let val r = expr e
307 : george 761 in genConst{r=r,i=toInt i,d=d}
308 : monnier 411 handle _ => gen({r=r,i=opn(T.LI i),d=d},reduceOpn)
309 :     end
310 :     val instrs =
311 :     case (comm,e1,e2) of
312 :     (_,e1,T.LI i) => const(e1,i)
313 :     | (COMMUTE,T.LI i,e2) => const(e2,i)
314 :     | _ => nonconst(e1,e2)
315 :     in app emit instrs;
316 :     genCmp0(cc,d)
317 :     end
318 : monnier 245
319 : monnier 411 (* emit 64-bit multiply or division operation (V9) *)
320 :     and muldiv64(a,genConst,e1,e2,d,cc,comm,an) =
321 :     let fun nonconst(e1,e2) =
322 :     [mark'(
323 :     case (opn e1,opn e2,comm) of
324 :     (i,I.REG r,COMMUTE) => I.ARITH{a=a,r=r,i=i,d=d}
325 :     | (I.REG r,i,_) => I.ARITH{a=a,r=r,i=i,d=d}
326 :     | (r,i,_) => I.ARITH{a=a,r=reduceOpn r,i=i,d=d},an)
327 :     ]
328 :     fun const(e,i) =
329 :     let val r = expr e
330 : george 761 in genConst{r=r,i=toInt i,d=d}
331 : monnier 411 handle _ => [mark'(I.ARITH{a=a,r=r,i=opn(T.LI i),d=d},an)]
332 :     end
333 :     val instrs =
334 :     case (comm,e1,e2) of
335 :     (_,e1,T.LI i) => const(e1,i)
336 :     | (COMMUTE,T.LI i,e2) => const(e2,i)
337 :     | _ => nonconst(e1,e2)
338 :     in app emit instrs;
339 :     genCmp0(cc,d)
340 :     end
341 :    
342 :     (* divisions *)
343 : george 545 and divu32 x = Mulu32.divide{mode=T.TO_ZERO,stm=doStmt} x
344 : leunga 657 and divs32 x = Muls32.divide{mode=T.TO_ZERO,stm=doStmt} x
345 : george 545 and divt32 x = Mult32.divide{mode=T.TO_ZERO,stm=doStmt} x
346 :     and divu64 x = Mulu64.divide{mode=T.TO_ZERO,stm=doStmt} x
347 : leunga 657 and divs64 x = Muls64.divide{mode=T.TO_ZERO,stm=doStmt} x
348 : george 545 and divt64 x = Mult64.divide{mode=T.TO_ZERO,stm=doStmt} x
349 : monnier 411
350 :     (* emit an unary floating point op *)
351 :     and funary(a,e,d,an) = mark(I.FPop1{a=a,r=fexpr e,d=d},an)
352 :    
353 :     (* emit a binary floating point op *)
354 :     and farith(a,e1,e2,d,an) =
355 :     mark(I.FPop2{a=a,r1=fexpr e1,r2=fexpr e2,d=d},an)
356 :    
357 :     (* convert an expression into an addressing mode *)
358 :     and addr(T.ADD(_,e,T.LI n)) =
359 : george 761 if immed13 n then (expr e,I.IMMED(toInt n))
360 : monnier 411 else let val d = newReg()
361 :     in loadImmed(n,d,REG,[]); (d,opn e) end
362 : leunga 775 | addr(T.ADD(_,e,x as T.CONST c)) = (expr e,I.LAB x)
363 :     | addr(T.ADD(_,e,x as T.LABEL l)) = (expr e,I.LAB x)
364 :     | addr(T.ADD(_,e,T.LABEXP x)) = (expr e,I.LAB x)
365 : monnier 411 | addr(T.ADD(ty,i as T.LI _,e)) = addr(T.ADD(ty,e,i))
366 : leunga 775 | addr(T.ADD(_,x as T.CONST c,e)) = (expr e,I.LAB x)
367 :     | addr(T.ADD(_,x as T.LABEL l,e)) = (expr e,I.LAB x)
368 :     | addr(T.ADD(_,T.LABEXP x,e)) = (expr e,I.LAB x)
369 : monnier 411 | addr(T.ADD(_,e1,e2)) = (expr e1,I.REG(expr e2))
370 : george 761 | addr(T.SUB(ty,e,T.LI n)) = addr(T.ADD(ty,e,T.LI(T.I.NEG(32,n))))
371 : leunga 775 | addr(x as T.LABEL l) = (zeroR,I.LAB x)
372 :     | addr(T.LABEXP x) = (zeroR,I.LAB x)
373 : monnier 411 | addr a = (expr a,zeroOpn)
374 :    
375 :     (* emit an integer load *)
376 :     and load(l,a,d,mem,cc,an) =
377 :     let val (r,i) = addr a
378 :     in mark(I.LOAD{l=l,r=r,i=i,d=d,mem=mem},an);
379 :     genCmp0(cc,d)
380 :     end
381 :    
382 :     (* emit an integer store *)
383 :     and store(s,a,d,mem,an) =
384 :     let val (r,i) = addr a
385 :     in mark(I.STORE{s=s,r=r,i=i,d=expr d,mem=mem},an) end
386 :    
387 :     (* emit a floating point load *)
388 :     and fload(l,a,d,mem,an) =
389 :     let val (r,i) = addr a
390 :     in mark(I.FLOAD{l=l,r=r,i=i,d=d,mem=mem},an) end
391 :    
392 :     (* emit a floating point store *)
393 :     and fstore(s,a,d,mem,an) =
394 :     let val (r,i) = addr a
395 :     in mark(I.FSTORE{s=s,r=r,i=i,d=fexpr d,mem=mem},an) end
396 :    
397 :     (* emit a jump *)
398 :     and jmp(a,labs,an) =
399 :     let val (r,i) = addr a
400 :     in mark(I.JMP{r=r,i=i,labs=labs,nop=true},an) end
401 :    
402 : george 545 (* convert mlrisc to cellset *)
403 :     and cellset mlrisc =
404 :     let fun g([],set) = set
405 : leunga 744 | g(T.GPR(T.REG(_,r))::regs,set) = g(regs,C.CellSet.add(r,set))
406 :     | g(T.FPR(T.FREG(_,f))::regs,set) = g(regs,C.CellSet.add(f,set))
407 :     | g(T.CCR(T.CC(_,cc))::regs,set) = g(regs,C.CellSet.add(cc,set))
408 : george 545 | g(_::regs, set) = g(regs,set)
409 :     in g(mlrisc, C.empty) end
410 :    
411 : monnier 411 (* emit a function call *)
412 : blume 839 and call(a,flow,defs,uses,mem,cutsTo,an,0) =
413 :     let val (r,i) = addr a
414 :     val defs=cellset(defs)
415 :     val uses=cellset(uses)
416 :     in case (C.registerId r,i) of
417 :     (0,I.LAB(T.LABEL l)) =>
418 :     mark(I.CALL{label=l,defs=C.addReg(C.linkReg,defs),uses=uses,
419 :     cutsTo=cutsTo,mem=mem,nop=true},an)
420 :     | _ => mark(I.JMPL{r=r,i=i,d=C.linkReg,defs=defs,uses=uses,
421 :     cutsTo=cutsTo,mem=mem,nop=true},an)
422 :     end
423 :     | call _ = error "pops<>0 not implemented"
424 : monnier 245
425 : monnier 411 (* emit an integer branch instruction *)
426 : leunga 744 and branch(T.CMP(ty,cond,a,b),lab,an) =
427 : monnier 411 let val (cond,a,b) =
428 :     case a of
429 : george 761 (T.LI _ | T.CONST _ | T.LABEL _) =>
430 : george 545 (T.Basis.swapCond cond,b,a)
431 : monnier 411 | _ => (cond,a,b)
432 :     in if V9 then
433 :     branchV9(cond,a,b,lab,an)
434 :     else
435 :     (doExpr(T.SUB(ty,a,b),newReg(),CC,[]); br(cond,lab,an))
436 :     end
437 : leunga 744 | branch(T.CC(cond,r),lab,an) =
438 :     if C.sameCell(r, C.psr) then br(cond,lab,an)
439 :     else (genCmp0(CC,r); br(cond,lab,an))
440 :     | branch(T.FCMP(fty,cond,a,b),lab,an) =
441 : george 545 let val cmp = case fty of
442 :     32 => I.FCMPs
443 :     | 64 => I.FCMPd
444 :     | _ => error "fbranch"
445 :     in emit(I.FCMP{cmp=cmp,r1=fexpr a,r2=fexpr b,nop=true});
446 :     mark(I.FBfcc{b=fcond cond,a=false,label=lab,nop=true},an)
447 :     end
448 : monnier 411 | branch _ = error "branch"
449 : monnier 245
450 : monnier 411 and branchV9(cond,a,b,lab,an) =
451 : leunga 624 let val size = Gen.Size.size a
452 : monnier 411 in if useBR andalso signedCmp cond then
453 :     let val r = newReg()
454 :     in doExpr(T.SUB(size,a,b),r,REG,[]);
455 :     brcond(cond,r,lab,an)
456 :     end
457 :     else
458 :     let val cc = case size of 32 => I.ICC
459 :     | 64 => I.XCC
460 :     | _ => error "branchV9"
461 :     in doExpr(T.SUB(size,a,b),newReg(),CC,[]);
462 :     bp(cond,cc,lab,an)
463 :     end
464 :     end
465 : monnier 245
466 : monnier 411 and br(c,lab,an) = mark(I.Bicc{b=cond c,a=true,label=lab,nop=true},an)
467 : monnier 245
468 : monnier 411 and brcond(c,r,lab,an) =
469 :     mark(I.BR{rcond=rcond c,r=r,p=I.PT,a=true,label=lab,nop=true},an)
470 : monnier 245
471 : monnier 411 and bp(c,cc,lab,an) =
472 :     mark(I.BP{b=cond c,cc=cc,p=I.PT,a=true,label=lab,nop=true},an)
473 : monnier 245
474 : monnier 411 (* generate code for a statement *)
475 :     and stmt(T.MV(_,d,e),an) = doExpr(e,d,REG,an)
476 :     | stmt(T.FMV(_,d,e),an) = doFexpr(e,d,an)
477 :     | stmt(T.CCMV(d,e),an) = doCCexpr(e,d,an)
478 :     | stmt(T.COPY(_,dst,src),an) = copy(dst,src,an)
479 : monnier 475 | stmt(T.FCOPY(_,dst,src),an) = fcopy(dst,src,an)
480 : leunga 775 | stmt(T.JMP(T.LABEL l,_),an) =
481 : monnier 411 mark(I.Bicc{b=I.BA,a=true,label=l,nop=false},an)
482 : leunga 744 | stmt(T.JMP(e,labs),an) = jmp(e,labs,an)
483 : blume 839 | stmt(T.CALL{funct,targets,defs,uses,region,pops,...},an) =
484 :     call(funct,targets,defs,uses,region,[],an,pops)
485 : leunga 796 | stmt(T.FLOW_TO
486 : blume 839 (T.CALL{funct,targets,defs,uses,region,pops,...},cutsTo),an) =
487 :     call(funct,targets,defs,uses,region,cutsTo,an,pops)
488 : george 545 | stmt(T.RET _,an) = mark(I.RET{leaf=not registerwindow,nop=true},an)
489 : monnier 411 | stmt(T.STORE(8,a,d,mem),an) = store(I.STB,a,d,mem,an)
490 :     | stmt(T.STORE(16,a,d,mem),an) = store(I.STH,a,d,mem,an)
491 :     | stmt(T.STORE(32,a,d,mem),an) = store(I.ST,a,d,mem,an)
492 :     | stmt(T.STORE(64,a,d,mem),an) =
493 :     store(if V9 then I.STX else I.STD,a,d,mem,an)
494 :     | stmt(T.FSTORE(32,a,d,mem),an) = fstore(I.STF,a,d,mem,an)
495 :     | stmt(T.FSTORE(64,a,d,mem),an) = fstore(I.STDF,a,d,mem,an)
496 : leunga 744 | stmt(T.BCC(cc,lab),an) = branch(cc,lab,an)
497 : george 545 | stmt(T.DEFINE l,_) = defineLabel l
498 : monnier 411 | stmt(T.ANNOTATION(s,a),an) = stmt(s,a::an)
499 : george 555 | stmt(T.EXT s,an) = ExtensionComp.compileSext(reducer()) {stm=s, an=an}
500 : george 545 | stmt(s,an) = doStmts(Gen.compileStm s)
501 : monnier 245
502 : monnier 411 and doStmt s = stmt(s,[])
503 : monnier 245
504 : george 545 and doStmts ss = app doStmt ss
505 : monnier 245
506 : monnier 411 (* convert an expression into a register *)
507 : george 761 and expr e = let
508 :     fun comp() = let
509 :     val d = newReg()
510 :     in doExpr(e, d, REG, []); d
511 :     end
512 :     in case e
513 :     of T.REG(_,r) => r
514 :     | T.LI z => if T.I.isZero z then zeroR else comp()
515 :     | _ => comp()
516 :     end
517 : monnier 245
518 : monnier 411 (* compute an integer expression and put the result in register d
519 :     * If cc is set then set the condition code with the result.
520 :     *)
521 :     and doExpr(e,d,cc,an) =
522 :     case e of
523 :     T.REG(_,r) => (move(r,d,an); genCmp0(cc,r))
524 :     | T.LI n => loadImmed(n,d,cc,an)
525 : leunga 775 | T.LABEL l => loadLabel(e,d,cc,an)
526 :     | T.CONST c => loadLabel(e,d,cc,an)
527 :     | T.LABEXP x => loadLabel(x,d,cc,an)
528 : monnier 245
529 : monnier 411 (* generic 32/64 bit support *)
530 :     | T.ADD(_,a,b) => arith(I.ADD,I.ADDCC,a,b,d,cc,COMMUTE,[],an)
531 : george 761 | T.SUB(_,a,b) => let
532 :     fun default() = arith(I.SUB,I.SUBCC,a,b,d,cc,NOCOMMUTE,[],an)
533 :     in
534 :     case b
535 :     of T.LI z =>
536 :     if T.I.isZero(z) then doExpr(a,d,cc,an) else default()
537 :     | _ => default()
538 :     (*esac*)
539 :     end
540 :    
541 : monnier 411 | T.ANDB(_,a,T.NOTB(_,b)) =>
542 :     arith(I.ANDN,I.ANDNCC,a,b,d,cc,NOCOMMUTE,[],an)
543 :     | T.ORB(_,a,T.NOTB(_,b)) =>
544 :     arith(I.ORN,I.ORNCC,a,b,d,cc,NOCOMMUTE,[],an)
545 :     | T.XORB(_,a,T.NOTB(_,b)) =>
546 :     arith(I.XNOR,I.XNORCC,a,b,d,cc,COMMUTE,[],an)
547 :     | T.ANDB(_,T.NOTB(_,a),b) =>
548 :     arith(I.ANDN,I.ANDNCC,b,a,d,cc,NOCOMMUTE,[],an)
549 :     | T.ORB(_,T.NOTB(_,a),b) =>
550 :     arith(I.ORN,I.ORNCC,b,a,d,cc,NOCOMMUTE,[],an)
551 :     | T.XORB(_,T.NOTB(_,a),b) =>
552 :     arith(I.XNOR,I.XNORCC,b,a,d,cc,COMMUTE,[],an)
553 :     | T.NOTB(_,T.XORB(_,a,b)) =>
554 :     arith(I.XNOR,I.XNORCC,a,b,d,cc,COMMUTE,[],an)
555 : monnier 245
556 : monnier 411 | T.ANDB(_,a,b) => arith(I.AND,I.ANDCC,a,b,d,cc,COMMUTE,[],an)
557 :     | T.ORB(_,a,b) => arith(I.OR,I.ORCC,a,b,d,cc,COMMUTE,[],an)
558 :     | T.XORB(_,a,b) => arith(I.XOR,I.XORCC,a,b,d,cc,COMMUTE,[],an)
559 : george 761 | T.NOTB(_,a) => arith(I.XNOR,I.XNORCC,a,LI 0,d,cc,COMMUTE,[],an)
560 : monnier 245
561 : monnier 411 (* 32 bit support *)
562 :     | T.SRA(32,a,b) => shift(I.SRA,a,b,d,cc,an)
563 :     | T.SRL(32,a,b) => shift(I.SRL,a,b,d,cc,an)
564 :     | T.SLL(32,a,b) => shift(I.SLL,a,b,d,cc,an)
565 :     | T.ADDT(32,a,b)=>
566 :     arith(I.ADDCC,I.ADDCC,a,b,d,CC_REG,COMMUTE,trap32,an)
567 :     | T.SUBT(32,a,b)=>
568 :     arith(I.SUBCC,I.SUBCC,a,b,d,CC_REG,NOCOMMUTE,trap32,an)
569 : leunga 657 | T.MULU(32,a,b) => extarith(P.umul32,
570 :     Mulu32.multiply,a,b,d,cc,COMMUTE)
571 :     | T.MULS(32,a,b) => extarith(P.smul32,
572 :     Muls32.multiply,a,b,d,cc,COMMUTE)
573 :     | T.MULT(32,a,b) => extarith(P.smul32trap,
574 :     Mult32.multiply,a,b,d,cc,COMMUTE)
575 :     | T.DIVU(32,a,b) => extarith(P.udiv32,divu32,a,b,d,cc,NOCOMMUTE)
576 :     | T.DIVS(32,a,b) => extarith(P.sdiv32,divs32,a,b,d,cc,NOCOMMUTE)
577 :     | T.DIVT(32,a,b) => extarith(P.sdiv32trap,divt32,a,b,d,cc,NOCOMMUTE)
578 : monnier 245
579 : monnier 411 (* 64 bit support *)
580 :     | T.SRA(64,a,b) => shift(I.SRAX,a,b,d,cc,an)
581 :     | T.SRL(64,a,b) => shift(I.SRLX,a,b,d,cc,an)
582 :     | T.SLL(64,a,b) => shift(I.SLLX,a,b,d,cc,an)
583 :     | T.ADDT(64,a,b)=>
584 :     arith(I.ADDCC,I.ADDCC,a,b,d,CC_REG,COMMUTE,trap64,an)
585 :     | T.SUBT(64,a,b)=>
586 :     arith(I.SUBCC,I.SUBCC,a,b,d,CC_REG,NOCOMMUTE,trap64,an)
587 :     | T.MULU(64,a,b) =>
588 :     muldiv64(I.MULX,Mulu64.multiply,a,b,d,cc,COMMUTE,an)
589 : leunga 657 | T.MULS(64,a,b) =>
590 :     muldiv64(I.MULX,Muls64.multiply,a,b,d,cc,COMMUTE,an)
591 : monnier 411 | T.MULT(64,a,b) =>
592 :     (muldiv64(I.MULX,Mult64.multiply,a,b,d,CC_REG,COMMUTE,an);
593 :     app emit trap64)
594 :     | T.DIVU(64,a,b) => muldiv64(I.UDIVX,divu64,a,b,d,cc,NOCOMMUTE,an)
595 : leunga 657 | T.DIVS(64,a,b) => muldiv64(I.SDIVX,divs64,a,b,d,cc,NOCOMMUTE,an)
596 : monnier 411 | T.DIVT(64,a,b) => muldiv64(I.SDIVX,divt64,a,b,d,cc,NOCOMMUTE,an)
597 : monnier 245
598 : monnier 411 (* loads *)
599 :     | T.LOAD(8,a,mem) => load(I.LDUB,a,d,mem,cc,an)
600 : leunga 744 | T.SX(_,_,T.LOAD(8,a,mem)) => load(I.LDSB,a,d,mem,cc,an)
601 : monnier 411 | T.LOAD(16,a,mem) => load(I.LDUH,a,d,mem,cc,an)
602 : leunga 744 | T.SX(_,_,T.LOAD(16,a,mem)) => load(I.LDSH,a,d,mem,cc,an)
603 : monnier 411 | T.LOAD(32,a,mem) => load(I.LD,a,d,mem,cc,an)
604 : george 545 | T.LOAD(64,a,mem) =>
605 :     load(if V9 then I.LDX else I.LDD,a,d,mem,cc,an)
606 : monnier 245
607 : monnier 411 (* conditional expression *)
608 : george 545 | T.COND exp => doStmts (Gen.compileCond{exp=exp,rd=d,an=an})
609 : monnier 411
610 :     (* misc *)
611 : george 545 | T.LET(s,e) => (doStmt s; doExpr(e, d, cc, an))
612 :     | T.MARK(e,A.MARKREG f) => (f d; doExpr(e,d,cc,an))
613 :     | T.MARK(e,a) => doExpr(e,d,cc,a::an)
614 :     | T.PRED(e,c) => doExpr(e,d,cc,A.CTRLUSE c::an)
615 : george 555 | T.REXT e => ExtensionComp.compileRext (reducer()) {e=e, rd=d, an=an}
616 : george 545 | e => doExpr(Gen.compileRexp e,d,cc,an)
617 : monnier 411
618 :     (* generate a comparison with zero *)
619 :     and genCmp0(REG,_) = ()
620 : leunga 744 | genCmp0(_,d) = emit(I.ARITH{a=I.SUBCC,r=d,i=zeroOpn,d=zeroR})
621 : monnier 411
622 :     (* convert an expression into a floating point register *)
623 :     and fexpr(T.FREG(_,r)) = r
624 :     | fexpr e = let val d = newFreg() in doFexpr(e,d,[]); d end
625 :    
626 :     (* compute a floating point expression and put the result in d *)
627 :     and doFexpr(e,d,an) =
628 :     case e of
629 :     (* single precision *)
630 :     T.FREG(32,r) => fmoves(r,d,an)
631 :     | T.FLOAD(32,ea,mem) => fload(I.LDF,ea,d,mem,an)
632 :     | T.FADD(32,a,b) => farith(I.FADDs,a,b,d,an)
633 :     | T.FSUB(32,a,b) => farith(I.FSUBs,a,b,d,an)
634 :     | T.FMUL(32,a,b) => farith(I.FMULs,a,b,d,an)
635 :     | T.FDIV(32,a,b) => farith(I.FDIVs,a,b,d,an)
636 :     | T.FABS(32,a) => funary(I.FABSs,a,d,an)
637 :     | T.FNEG(32,a) => funary(I.FNEGs,a,d,an)
638 :     | T.FSQRT(32,a) => funary(I.FSQRTs,a,d,an)
639 :    
640 :     (* double precision *)
641 :     | T.FREG(64,r) => fmoved(r,d,an)
642 :     | T.FLOAD(64,ea,mem) => fload(I.LDDF,ea,d,mem,an)
643 :     | T.FADD(64,a,b) => farith(I.FADDd,a,b,d,an)
644 :     | T.FSUB(64,a,b) => farith(I.FSUBd,a,b,d,an)
645 :     | T.FMUL(64,a,b) => farith(I.FMULd,a,b,d,an)
646 :     | T.FDIV(64,a,b) => farith(I.FDIVd,a,b,d,an)
647 :     | T.FABS(64,a) => funary(I.FABSd,a,d,an)
648 :     | T.FNEG(64,a) => funary(I.FNEGd,a,d,an)
649 :     | T.FSQRT(64,a) => funary(I.FSQRTd,a,d,an)
650 :    
651 :     (* quad precision *)
652 :     | T.FREG(128,r) => fmoveq(r,d,an)
653 :     | T.FADD(128,a,b) => farith(I.FADDq,a,b,d,an)
654 :     | T.FSUB(128,a,b) => farith(I.FSUBq,a,b,d,an)
655 :     | T.FMUL(128,a,b) => farith(I.FMULq,a,b,d,an)
656 :     | T.FDIV(128,a,b) => farith(I.FDIVq,a,b,d,an)
657 :     | T.FABS(128,a) => funary(I.FABSq,a,d,an)
658 :     | T.FNEG(128,a) => funary(I.FNEGq,a,d,an)
659 :     | T.FSQRT(128,a) => funary(I.FSQRTq,a,d,an)
660 :    
661 :     (* floating point to floating point *)
662 : george 545 | T.CVTF2F(ty,ty',e) =>
663 : monnier 475 (case (ty,ty') of
664 :     (32,32) => doFexpr(e,d,an)
665 :     | (64,32) => funary(I.FsTOd,e,d,an)
666 : monnier 411 | (128,32) => funary(I.FsTOq,e,d,an)
667 : monnier 475 | (32,64) => funary(I.FdTOs,e,d,an)
668 :     | (64,64) => doFexpr(e,d,an)
669 : monnier 411 | (128,64) => funary(I.FdTOq,e,d,an)
670 :     | (32,128) => funary(I.FqTOs,e,d,an)
671 :     | (64,128) => funary(I.FqTOd,e,d,an)
672 :     | (128,128) => doFexpr(e,d,an)
673 :     | _ => error "CVTF2F"
674 :     )
675 :    
676 :     (* integer to floating point *)
677 : george 545 | T.CVTI2F(32,32,e) => app emit (P.cvti2s({i=opn e,d=d},reduceOpn))
678 :     | T.CVTI2F(64,32,e) => app emit (P.cvti2d({i=opn e,d=d},reduceOpn))
679 :     | T.CVTI2F(128,32,e) => app emit (P.cvti2q({i=opn e,d=d},reduceOpn))
680 : monnier 411
681 : george 545 | T.FMARK(e,A.MARKREG f) => (f d; doFexpr(e,d,an))
682 :     | T.FMARK(e,a) => doFexpr(e,d,a::an)
683 :     | T.FPRED(e,c) => doFexpr(e,d,A.CTRLUSE c::an)
684 : george 555 | T.FEXT e => ExtensionComp.compileFext (reducer()) {e=e, fd=d, an=an}
685 : george 545 | e => doFexpr(Gen.compileFexp e,d,an)
686 : monnier 411
687 : leunga 744 and doCCexpr(T.CMP(ty,cond,e1,e2),cc,an) =
688 :     if C.sameCell(cc,C.psr) then
689 :     doExpr(T.SUB(ty,e1,e2),newReg(),CC,an)
690 :     else error "doCCexpr"
691 :     | doCCexpr(T.CC(_,r),d,an) =
692 :     if C.sameColor(r,C.psr) then error "doCCexpr"
693 :     else move(r,d,an)
694 : george 545 | doCCexpr(T.CCMARK(e,A.MARKREG f),d,an) = (f d; doCCexpr(e,d,an))
695 :     | doCCexpr(T.CCMARK(e,a),d,an) = doCCexpr(e,d,a::an)
696 :     | doCCexpr(T.CCEXT e,d,an) =
697 : george 555 ExtensionComp.compileCCext (reducer()) {e=e, ccd=d, an=an}
698 : monnier 411 | doCCexpr e = error "doCCexpr"
699 :    
700 :     and ccExpr e = let val d = newReg() in doCCexpr(e,d,[]); d end
701 :    
702 :     (* convert an expression into an operand *)
703 : leunga 775 and opn(x as T.CONST c) = I.LAB x
704 :     | opn(x as T.LABEL l) = I.LAB x
705 :     | opn(T.LABEXP x) = I.LAB x
706 : george 761 | opn(e as T.LI n) =
707 :     if T.I.isZero(n) then zeroOpn
708 :     else if immed13 n then I.IMMED(toInt n)
709 :     else I.REG(expr e)
710 : monnier 411 | opn e = I.REG(expr e)
711 :    
712 : george 545 and reducer() =
713 :     T.REDUCER{reduceRexp = expr,
714 :     reduceFexp = fexpr,
715 :     reduceCCexp = ccExpr,
716 :     reduceStm = stmt,
717 :     operand = opn,
718 :     reduceOperand = reduceOpn,
719 :     addressOf = addr,
720 :     emit = mark,
721 :     instrStream = instrStream,
722 :     mltreeStream = self()
723 :     }
724 :     and self() =
725 :     S.STREAM
726 : leunga 815 { beginCluster = beginCluster,
727 :     endCluster = endCluster,
728 :     emit = doStmt,
729 :     pseudoOp = pseudoOp,
730 :     defineLabel = defineLabel,
731 :     entryLabel = entryLabel,
732 :     comment = comment,
733 :     annotation = annotation,
734 :     getAnnotations = getAnnotations,
735 :     exitBlock = fn regs => exitBlock(cellset regs)
736 : george 545 }
737 :     in self()
738 : monnier 245 end
739 :    
740 :     end
741 :    
742 : monnier 411 (*
743 :     * Machine code generator for SPARC.
744 : monnier 245 *
745 : monnier 411 * The SPARC architecture has 32 general purpose registers (%g0 is always 0)
746 :     * and 32 single precision floating point registers.
747 : monnier 245 *
748 : monnier 411 * Some Ugliness: double precision floating point registers are
749 :     * register pairs. There are no double precision moves, negation and absolute
750 :     * values. These require two single precision operations. I've created
751 :     * composite instructions FMOVd, FNEGd and FABSd to stand for these.
752 : monnier 245 *
753 : monnier 411 * All integer arithmetic instructions can optionally set the condition
754 :     * code register. We use this to simplify certain comparisons with zero.
755 : monnier 245 *
756 : monnier 411 * Integer multiplication, division and conversion from integer to floating
757 :     * go thru the pseudo instruction interface, since older sparcs do not
758 :     * implement these instructions in hardware.
759 : monnier 245 *
760 : monnier 411 * In addition, the trap instruction for detecting overflow is a parameter.
761 :     * This allows different trap vectors to be used.
762 : monnier 245 *
763 : monnier 411 * -- Allen
764 :     *)

root@smlnj-gforge.cs.uchicago.edu
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