11 |
functor SparcRegAlloc(structure I : INSTRUCTIONS where C = SparcCells |
functor SparcRegAlloc(structure I : INSTRUCTIONS where C = SparcCells |
12 |
structure P : INSN_PROPERTIES where I = I |
structure P : INSN_PROPERTIES where I = I |
13 |
structure F : FLOWGRAPH where I = I |
structure F : FLOWGRAPH where I = I |
14 |
structure Asm : EMITTER_NEW where I = I and P=F.P |
structure Asm : INSTRUCTION_EMITTER where I = I and P=F.P |
15 |
) : |
) : |
16 |
sig |
sig |
17 |
|
structure I : INSTRUCTIONS |
18 |
functor IntRa (structure RaUser : RA_USER_PARAMS |
functor IntRa (structure RaUser : RA_USER_PARAMS |
19 |
where type I.operand = I.operand |
where I = I and B = F.B) : RA |
|
and type I.instruction = I.instruction |
|
|
and type B.name = F.B.name) : RA |
|
|
|
|
20 |
functor FloatRa (structure RaUser : RA_USER_PARAMS |
functor FloatRa (structure RaUser : RA_USER_PARAMS |
21 |
where type I.operand = I.operand |
where I = I and B = F.B) : RA |
|
and type I.instruction = I.instruction |
|
|
and type B.name = F.B.name) : RA |
|
22 |
end = |
end = |
23 |
struct |
struct |
24 |
|
|
25 |
|
structure I = I |
26 |
structure C=I.C |
structure C=I.C |
27 |
|
|
28 |
(* liveness analysis for general purpose registers *) |
(* liveness analysis for general purpose registers *) |
30 |
Liveness(structure Flowgraph=F |
Liveness(structure Flowgraph=F |
31 |
structure Instruction=I |
structure Instruction=I |
32 |
val defUse = P.defUse C.GP |
val defUse = P.defUse C.GP |
33 |
fun regSet c = #1 (c:SparcCells.cellset) |
val regSet = C.getCell C.GP |
34 |
fun cellset((_,f),r) = (r,f)) |
val cellset = C.updateCell C.GP) |
35 |
|
|
36 |
|
|
37 |
functor IntRa = |
functor IntRa = |
46 |
val firstPseudoR = 32 |
val firstPseudoR = 32 |
47 |
val maxPseudoR = SparcCells.maxCell |
val maxPseudoR = SparcCells.maxCell |
48 |
val numRegs = SparcCells.numCell SparcCells.GP |
val numRegs = SparcCells.numCell SparcCells.GP |
49 |
fun regSet c = #1 (c:SparcCells.cellset) |
val regSet = C.getCell C.GP |
50 |
end) |
end) |
51 |
|
|
52 |
(* liveness analysis for floating point registers *) |
(* liveness analysis for floating point registers *) |
54 |
Liveness(structure Flowgraph=F |
Liveness(structure Flowgraph=F |
55 |
structure Instruction=I |
structure Instruction=I |
56 |
val defUse = P.defUse C.FP |
val defUse = P.defUse C.FP |
57 |
fun regSet c = #2 (c:SparcCells.cellset) |
val regSet = C.getCell C.FP |
58 |
fun cellset((r,_),f) = (r,f)) |
val cellset = C.updateCell C.FP) |
59 |
|
|
60 |
functor FloatRa = |
functor FloatRa = |
61 |
RegAllocator |
RegAllocator |
66 |
structure Liveness=FregLiveness |
structure Liveness=FregLiveness |
67 |
|
|
68 |
val defUse = P.defUse C.FP |
val defUse = P.defUse C.FP |
69 |
val firstPseudoR = 32 |
val firstPseudoR = 64 |
70 |
val maxPseudoR = SparcCells.maxCell |
val maxPseudoR = SparcCells.maxCell |
71 |
val numRegs = SparcCells.numCell SparcCells.FP |
val numRegs = SparcCells.numCell SparcCells.FP |
72 |
fun regSet c = #2 (c:SparcCells.cellset) |
val regSet = C.getCell C.FP |
73 |
end) |
end) |
74 |
end |
end |
75 |
|
|
|
(* |
|
|
* $Log: sparcRegAlloc.sml,v $ |
|
|
* Revision 1.1.1.1 1999/01/04 21:56:27 george |
|
|
* Version 110.12 |
|
|
* |
|
|
* Revision 1.3 1998/10/06 14:06:27 george |
|
|
* fixed up some machine description problems. [leunga] |
|
|
* |
|
|
* Revision 1.2 1998/09/30 19:38:39 dbm |
|
|
* fixing sharing/defspec conflict |
|
|
* |
|
|
* Revision 1.1.1.1 1998/08/05 19:38:49 george |
|
|
* Release 110.7.4 |
|
|
* |
|
|
*) |
|