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[smlnj] Annotation of /sml/trunk/src/MLRISC/x86/emit/x86Asm.sml
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Annotation of /sml/trunk/src/MLRISC/x86/emit/x86Asm.sml

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1 : monnier 411 (*
2 : leunga 744 * WARNING: This file was automatically generated by MDLGen (v3.0)
3 :     * from the machine description file "x86/x86.mdl".
4 :     * DO NOT EDIT this file directly
5 : monnier 247 *)
6 :    
7 :    
8 : george 984 functor X86AsmEmitter(structure S : INSTRUCTION_STREAM
9 :     structure Instr : X86INSTR
10 :     where T = S.P.T
11 : monnier 411 structure Shuffle : X86SHUFFLE
12 :     where I = Instr
13 : george 984 structure MLTreeEval : MLTREE_EVAL
14 :     where T = Instr.T
15 : monnier 411
16 : leunga 1156 (*#line 512.7 "x86/x86.mdl"*)
17 : monnier 411 structure MemRegs : MEMORY_REGISTERS where I=Instr
18 : george 823
19 : leunga 1156 (*#line 513.7 "x86/x86.mdl"*)
20 : george 889 val memRegBase : CellsBasis.cell option
21 : monnier 411 ) : INSTRUCTION_EMITTER =
22 : monnier 247 struct
23 : monnier 411 structure I = Instr
24 :     structure C = I.C
25 : leunga 775 structure T = I.T
26 : george 984 structure S = S
27 : monnier 411 structure P = S.P
28 :     structure Constant = I.Constant
29 :    
30 : blume 1126 open AsmFlags
31 : monnier 498
32 : george 545 fun error msg = MLRiscErrorMsg.error("X86AsmEmitter",msg)
33 : monnier 411
34 : monnier 429 fun makeStream formatAnnotations =
35 : monnier 411 let val stream = !AsmStream.asmOutStream
36 : monnier 429 fun emit' s = TextIO.output(stream,s)
37 :     val newline = ref true
38 :     val tabs = ref 0
39 :     fun tabbing 0 = ()
40 :     | tabbing n = (emit' "\t"; tabbing(n-1))
41 :     fun emit s = (tabbing(!tabs); tabs := 0; newline := false; emit' s)
42 :     fun nl() = (tabs := 0; if !newline then () else (newline := true; emit' "\n"))
43 : monnier 411 fun comma() = emit ","
44 : leunga 594 fun tab() = tabs := 1
45 :     fun indent() = tabs := 2
46 : monnier 429 fun ms n = let val s = Int.toString n
47 :     in if n<0 then "-"^String.substring(s,1,size s-1)
48 :     else s
49 :     end
50 : george 984 fun emit_label lab = emit(P.Client.AsmPseudoOps.lexpToString(T.LABEL lab))
51 :     fun emit_labexp le = emit(P.Client.AsmPseudoOps.lexpToString (T.LABEXP le))
52 : monnier 411 fun emit_const c = emit(Constant.toString c)
53 :     fun emit_int i = emit(ms i)
54 :     fun paren f = (emit "("; f(); emit ")")
55 : george 1017 fun defineLabel lab = emit(P.Client.AsmPseudoOps.defineLabel lab^"\n")
56 : monnier 411 fun entryLabel lab = defineLabel lab
57 : george 1116 fun comment msg = (tab(); emit("/* " ^ msg ^ " */"); nl())
58 : george 1108 fun annotation a = comment(Annotations.toString a)
59 : leunga 815 fun getAnnotations() = error "getAnnotations"
60 : george 545 fun doNothing _ = ()
61 : george 909 fun fail _ = raise Fail "AsmEmitter"
62 : monnier 411 fun emit_region mem = comment(I.Region.toString mem)
63 : george 545 val emit_region =
64 :     if !show_region then emit_region else doNothing
65 : george 984 fun pseudoOp pOp = (emit(P.toString pOp); emit "\n")
66 : monnier 411 fun init size = (comment("Code Size = " ^ ms size); nl())
67 : leunga 744 val emitCellInfo = AsmFormatUtil.reginfo
68 :     (emit,formatAnnotations)
69 : george 889 fun emitCell r = (emit(CellsBasis.toString r); emitCellInfo r)
70 : monnier 498 fun emit_cellset(title,cellset) =
71 : jhr 900 (nl(); comment(title^CellsBasis.CellSet.toString cellset))
72 : george 545 val emit_cellset =
73 :     if !show_cellset then emit_cellset else doNothing
74 : monnier 498 fun emit_defs cellset = emit_cellset("defs: ",cellset)
75 :     fun emit_uses cellset = emit_cellset("uses: ",cellset)
76 : leunga 796 val emit_cutsTo =
77 :     if !show_cutsTo then AsmFormatUtil.emit_cutsTo emit
78 :     else doNothing
79 : leunga 744 fun emitter instr =
80 :     let
81 : george 545 fun asm_cond (I.EQ) = "e"
82 :     | asm_cond (I.NE) = "ne"
83 :     | asm_cond (I.LT) = "l"
84 :     | asm_cond (I.LE) = "le"
85 :     | asm_cond (I.GT) = "g"
86 :     | asm_cond (I.GE) = "ge"
87 :     | asm_cond (I.B) = "b"
88 :     | asm_cond (I.BE) = "be"
89 :     | asm_cond (I.A) = "a"
90 :     | asm_cond (I.AE) = "ae"
91 :     | asm_cond (I.C) = "c"
92 :     | asm_cond (I.NC) = "nc"
93 :     | asm_cond (I.P) = "p"
94 :     | asm_cond (I.NP) = "np"
95 :     | asm_cond (I.O) = "o"
96 :     | asm_cond (I.NO) = "no"
97 :     and emit_cond x = emit (asm_cond x)
98 :     and asm_binaryOp (I.ADDL) = "addl"
99 :     | asm_binaryOp (I.SUBL) = "subl"
100 :     | asm_binaryOp (I.ANDL) = "andl"
101 :     | asm_binaryOp (I.ORL) = "orl"
102 :     | asm_binaryOp (I.XORL) = "xorl"
103 :     | asm_binaryOp (I.SHLL) = "shll"
104 :     | asm_binaryOp (I.SARL) = "sarl"
105 :     | asm_binaryOp (I.SHRL) = "shrl"
106 : leunga 815 | asm_binaryOp (I.MULL) = "mull"
107 :     | asm_binaryOp (I.IMULL) = "imull"
108 : george 545 | asm_binaryOp (I.ADCL) = "adcl"
109 :     | asm_binaryOp (I.SBBL) = "sbbl"
110 :     | asm_binaryOp (I.ADDW) = "addw"
111 :     | asm_binaryOp (I.SUBW) = "subw"
112 :     | asm_binaryOp (I.ANDW) = "andw"
113 :     | asm_binaryOp (I.ORW) = "orw"
114 :     | asm_binaryOp (I.XORW) = "xorw"
115 :     | asm_binaryOp (I.SHLW) = "shlw"
116 :     | asm_binaryOp (I.SARW) = "sarw"
117 :     | asm_binaryOp (I.SHRW) = "shrw"
118 : leunga 815 | asm_binaryOp (I.MULW) = "mulw"
119 :     | asm_binaryOp (I.IMULW) = "imulw"
120 : george 545 | asm_binaryOp (I.ADDB) = "addb"
121 :     | asm_binaryOp (I.SUBB) = "subb"
122 :     | asm_binaryOp (I.ANDB) = "andb"
123 :     | asm_binaryOp (I.ORB) = "orb"
124 :     | asm_binaryOp (I.XORB) = "xorb"
125 :     | asm_binaryOp (I.SHLB) = "shlb"
126 :     | asm_binaryOp (I.SARB) = "sarb"
127 :     | asm_binaryOp (I.SHRB) = "shrb"
128 : leunga 815 | asm_binaryOp (I.MULB) = "mulb"
129 :     | asm_binaryOp (I.IMULB) = "imulb"
130 : leunga 646 | asm_binaryOp (I.BTSW) = "btsw"
131 :     | asm_binaryOp (I.BTCW) = "btcw"
132 :     | asm_binaryOp (I.BTRW) = "btrw"
133 :     | asm_binaryOp (I.BTSL) = "btsl"
134 :     | asm_binaryOp (I.BTCL) = "btcl"
135 :     | asm_binaryOp (I.BTRL) = "btrl"
136 :     | asm_binaryOp (I.ROLW) = "rolw"
137 :     | asm_binaryOp (I.RORW) = "rorw"
138 :     | asm_binaryOp (I.ROLL) = "roll"
139 :     | asm_binaryOp (I.RORL) = "rorl"
140 :     | asm_binaryOp (I.XCHGB) = "xchgb"
141 :     | asm_binaryOp (I.XCHGW) = "xchgw"
142 :     | asm_binaryOp (I.XCHGL) = "xchgl"
143 :     | asm_binaryOp (I.LOCK_ADCW) = "lock\n\tadcw"
144 :     | asm_binaryOp (I.LOCK_ADCL) = "lock\n\tadcl"
145 :     | asm_binaryOp (I.LOCK_ADDW) = "lock\n\taddw"
146 :     | asm_binaryOp (I.LOCK_ADDL) = "lock\n\taddl"
147 :     | asm_binaryOp (I.LOCK_ANDW) = "lock\n\tandw"
148 :     | asm_binaryOp (I.LOCK_ANDL) = "lock\n\tandl"
149 :     | asm_binaryOp (I.LOCK_BTSW) = "lock\n\tbtsw"
150 :     | asm_binaryOp (I.LOCK_BTSL) = "lock\n\tbtsl"
151 :     | asm_binaryOp (I.LOCK_BTRW) = "lock\n\tbtrw"
152 :     | asm_binaryOp (I.LOCK_BTRL) = "lock\n\tbtrl"
153 :     | asm_binaryOp (I.LOCK_BTCW) = "lock\n\tbtcw"
154 :     | asm_binaryOp (I.LOCK_BTCL) = "lock\n\tbtcl"
155 :     | asm_binaryOp (I.LOCK_ORW) = "lock\n\torw"
156 :     | asm_binaryOp (I.LOCK_ORL) = "lock\n\torl"
157 :     | asm_binaryOp (I.LOCK_SBBW) = "lock\n\tsbbw"
158 :     | asm_binaryOp (I.LOCK_SBBL) = "lock\n\tsbbl"
159 :     | asm_binaryOp (I.LOCK_SUBW) = "lock\n\tsubw"
160 :     | asm_binaryOp (I.LOCK_SUBL) = "lock\n\tsubl"
161 :     | asm_binaryOp (I.LOCK_XORW) = "lock\n\txorw"
162 :     | asm_binaryOp (I.LOCK_XORL) = "lock\n\txorl"
163 : leunga 657 | asm_binaryOp (I.LOCK_XADDB) = "lock\n\txaddb"
164 :     | asm_binaryOp (I.LOCK_XADDW) = "lock\n\txaddw"
165 :     | asm_binaryOp (I.LOCK_XADDL) = "lock\n\txaddl"
166 : george 545 and emit_binaryOp x = emit (asm_binaryOp x)
167 : leunga 1156 and asm_multDivOp (I.IMULL1) = "imull"
168 :     | asm_multDivOp (I.MULL1) = "mull"
169 : leunga 815 | asm_multDivOp (I.IDIVL1) = "idivl"
170 :     | asm_multDivOp (I.DIVL1) = "divl"
171 : george 545 and emit_multDivOp x = emit (asm_multDivOp x)
172 :     and asm_unaryOp (I.DECL) = "decl"
173 :     | asm_unaryOp (I.INCL) = "incl"
174 :     | asm_unaryOp (I.NEGL) = "negl"
175 :     | asm_unaryOp (I.NOTL) = "notl"
176 : leunga 797 | asm_unaryOp (I.DECW) = "decw"
177 :     | asm_unaryOp (I.INCW) = "incw"
178 :     | asm_unaryOp (I.NEGW) = "negw"
179 : george 545 | asm_unaryOp (I.NOTW) = "notw"
180 : leunga 797 | asm_unaryOp (I.DECB) = "decb"
181 :     | asm_unaryOp (I.INCB) = "incb"
182 :     | asm_unaryOp (I.NEGB) = "negb"
183 : george 545 | asm_unaryOp (I.NOTB) = "notb"
184 : leunga 646 | asm_unaryOp (I.LOCK_DECL) = "lock\n\tdecl"
185 :     | asm_unaryOp (I.LOCK_INCL) = "lock\n\tincl"
186 :     | asm_unaryOp (I.LOCK_NEGL) = "lock\n\tnegl"
187 :     | asm_unaryOp (I.LOCK_NOTL) = "lock\n\tnotl"
188 : george 545 and emit_unaryOp x = emit (asm_unaryOp x)
189 : leunga 1156 and asm_shiftOp (I.SHLDL) = "shldl"
190 :     | asm_shiftOp (I.SHRDL) = "shrdl"
191 :     and emit_shiftOp x = emit (asm_shiftOp x)
192 : leunga 646 and asm_bitOp (I.BTW) = "btw"
193 :     | asm_bitOp (I.BTL) = "btl"
194 :     | asm_bitOp (I.LOCK_BTW) = "lock\n\tbtw"
195 :     | asm_bitOp (I.LOCK_BTL) = "lock\n\tbtl"
196 :     and emit_bitOp x = emit (asm_bitOp x)
197 : george 545 and asm_move (I.MOVL) = "movl"
198 :     | asm_move (I.MOVB) = "movb"
199 :     | asm_move (I.MOVW) = "movw"
200 :     | asm_move (I.MOVSWL) = "movswl"
201 :     | asm_move (I.MOVZWL) = "movzwl"
202 :     | asm_move (I.MOVSBL) = "movsbl"
203 :     | asm_move (I.MOVZBL) = "movzbl"
204 :     and emit_move x = emit (asm_move x)
205 : monnier 429 and asm_fbinOp (I.FADDP) = "faddp"
206 : george 555 | asm_fbinOp (I.FADDS) = "fadds"
207 : monnier 411 | asm_fbinOp (I.FMULP) = "fmulp"
208 : george 555 | asm_fbinOp (I.FMULS) = "fmuls"
209 : leunga 565 | asm_fbinOp (I.FCOMS) = "fcoms"
210 :     | asm_fbinOp (I.FCOMPS) = "fcomps"
211 : monnier 411 | asm_fbinOp (I.FSUBP) = "fsubp"
212 : george 555 | asm_fbinOp (I.FSUBS) = "fsubs"
213 : monnier 411 | asm_fbinOp (I.FSUBRP) = "fsubrp"
214 : george 555 | asm_fbinOp (I.FSUBRS) = "fsubrs"
215 : monnier 411 | asm_fbinOp (I.FDIVP) = "fdivp"
216 : george 555 | asm_fbinOp (I.FDIVS) = "fdivs"
217 : monnier 411 | asm_fbinOp (I.FDIVRP) = "fdivrp"
218 : george 555 | asm_fbinOp (I.FDIVRS) = "fdivrs"
219 :     | asm_fbinOp (I.FADDL) = "faddl"
220 :     | asm_fbinOp (I.FMULL) = "fmull"
221 : leunga 565 | asm_fbinOp (I.FCOML) = "fcoml"
222 :     | asm_fbinOp (I.FCOMPL) = "fcompl"
223 : george 555 | asm_fbinOp (I.FSUBL) = "fsubl"
224 :     | asm_fbinOp (I.FSUBRL) = "fsubrl"
225 :     | asm_fbinOp (I.FDIVL) = "fdivl"
226 :     | asm_fbinOp (I.FDIVRL) = "fdivrl"
227 : george 545 and emit_fbinOp x = emit (asm_fbinOp x)
228 : leunga 565 and asm_fibinOp (I.FIADDS) = "fiadds"
229 :     | asm_fibinOp (I.FIMULS) = "fimuls"
230 :     | asm_fibinOp (I.FICOMS) = "ficoms"
231 :     | asm_fibinOp (I.FICOMPS) = "ficomps"
232 :     | asm_fibinOp (I.FISUBS) = "fisubs"
233 :     | asm_fibinOp (I.FISUBRS) = "fisubrs"
234 :     | asm_fibinOp (I.FIDIVS) = "fidivs"
235 :     | asm_fibinOp (I.FIDIVRS) = "fidivrs"
236 :     | asm_fibinOp (I.FIADDL) = "fiaddl"
237 :     | asm_fibinOp (I.FIMULL) = "fimull"
238 :     | asm_fibinOp (I.FICOML) = "ficoml"
239 :     | asm_fibinOp (I.FICOMPL) = "ficompl"
240 :     | asm_fibinOp (I.FISUBL) = "fisubl"
241 :     | asm_fibinOp (I.FISUBRL) = "fisubrl"
242 :     | asm_fibinOp (I.FIDIVL) = "fidivl"
243 :     | asm_fibinOp (I.FIDIVRL) = "fidivrl"
244 :     and emit_fibinOp x = emit (asm_fibinOp x)
245 : leunga 744 and asm_funOp (I.FCHS) = "fchs"
246 :     | asm_funOp (I.FABS) = "fabs"
247 :     | asm_funOp (I.FTST) = "ftst"
248 :     | asm_funOp (I.FXAM) = "fxam"
249 : leunga 731 | asm_funOp (I.FPTAN) = "fptan"
250 :     | asm_funOp (I.FPATAN) = "fpatan"
251 : leunga 744 | asm_funOp (I.FXTRACT) = "fxtract"
252 :     | asm_funOp (I.FPREM1) = "fprem1"
253 :     | asm_funOp (I.FDECSTP) = "fdecstp"
254 :     | asm_funOp (I.FINCSTP) = "fincstp"
255 :     | asm_funOp (I.FPREM) = "fprem"
256 :     | asm_funOp (I.FYL2XP1) = "fyl2xp1"
257 :     | asm_funOp (I.FSQRT) = "fsqrt"
258 :     | asm_funOp (I.FSINCOS) = "fsincos"
259 :     | asm_funOp (I.FRNDINT) = "frndint"
260 : george 545 | asm_funOp (I.FSCALE) = "fscale"
261 : leunga 744 | asm_funOp (I.FSIN) = "fsin"
262 :     | asm_funOp (I.FCOS) = "fcos"
263 : george 545 and emit_funOp x = emit (asm_funOp x)
264 :     and asm_fenvOp (I.FLDENV) = "fldenv"
265 :     | asm_fenvOp (I.FNLDENV) = "fnldenv"
266 :     | asm_fenvOp (I.FSTENV) = "fstenv"
267 :     | asm_fenvOp (I.FNSTENV) = "fnstenv"
268 :     and emit_fenvOp x = emit (asm_fenvOp x)
269 : leunga 731 and asm_fsize (I.FP32) = "s"
270 :     | asm_fsize (I.FP64) = "l"
271 :     | asm_fsize (I.FP80) = "t"
272 :     and emit_fsize x = emit (asm_fsize x)
273 :     and asm_isize (I.I8) = "8"
274 :     | asm_isize (I.I16) = "16"
275 :     | asm_isize (I.I32) = "32"
276 :     | asm_isize (I.I64) = "64"
277 :     and emit_isize x = emit (asm_isize x)
278 : monnier 247
279 : leunga 1156 (*#line 515.6 "x86/x86.mdl"*)
280 : george 823 fun memReg r = MemRegs.memReg {reg=r, base=Option.valOf memRegBase}
281 : george 545
282 : leunga 1156 (*#line 516.6 "x86/x86.mdl"*)
283 : leunga 744 fun emitInt32 i =
284 :     let
285 : leunga 1156 (*#line 517.10 "x86/x86.mdl"*)
286 : leunga 744 val s = Int32.toString i
287 : monnier 247
288 : leunga 1156 (*#line 518.10 "x86/x86.mdl"*)
289 : leunga 744 val s = (if (i >= 0)
290 :     then s
291 :     else ("-" ^ (String.substring (s, 1, (size s) - 1))))
292 : george 545 in emit s
293 : monnier 429 end
294 :    
295 : leunga 1156 (*#line 521.6 "x86/x86.mdl"*)
296 : george 889 val {low=SToffset, ...} = C.cellRange CellsBasis.FP
297 : leunga 731
298 : leunga 1156 (*#line 523.6 "x86/x86.mdl"*)
299 : george 545 fun emitScale 0 = emit "1"
300 :     | emitScale 1 = emit "2"
301 :     | emitScale 2 = emit "4"
302 :     | emitScale 3 = emit "8"
303 :     | emitScale _ = error "emitScale"
304 :     and eImmed (I.Immed i) = emitInt32 i
305 :     | eImmed (I.ImmedLabel lexp) = emit_labexp lexp
306 :     | eImmed _ = error "eImmed"
307 : monnier 411 and emit_operand opn =
308 : leunga 744 (case opn of
309 :     I.Immed i =>
310 :     ( emit "$";
311 :     emitInt32 i )
312 :     | I.ImmedLabel lexp =>
313 :     ( emit "$";
314 :     emit_labexp lexp )
315 :     | I.LabelEA le => emit_labexp le
316 :     | I.Relative _ => error "emit_operand"
317 :     | I.Direct r => emitCell r
318 :     | I.MemReg r => emit_operand (memReg opn)
319 :     | I.ST f => emitCell f
320 :     | I.FPR f =>
321 :     ( emit "%f";
322 : george 889 emit (Int.toString (CellsBasis.registerNum f)))
323 : leunga 744 | I.FDirect f => emit_operand (memReg opn)
324 :     | I.Displace{base, disp, mem, ...} =>
325 :     ( emit_disp disp;
326 :     emit "(";
327 :     emitCell base;
328 :     emit ")";
329 :     emit_region mem )
330 :     | I.Indexed{base, index, scale, disp, mem, ...} =>
331 :     ( emit_disp disp;
332 :     emit "(";
333 :    
334 :     (case base of
335 :     NONE => ()
336 :     | SOME base => emitCell base
337 :     );
338 :     comma ();
339 :     emitCell index;
340 :     comma ();
341 :     emitScale scale;
342 :     emit ")";
343 :     emit_region mem )
344 : monnier 411 )
345 : george 889 and emit_operand8 (I.Direct r) = emit (CellsBasis.toStringWithSize (r, 8))
346 : leunga 695 | emit_operand8 opn = emit_operand opn
347 : george 545 and emit_disp (I.Immed 0) = ()
348 :     | emit_disp (I.Immed i) = emitInt32 i
349 :     | emit_disp (I.ImmedLabel lexp) = emit_labexp lexp
350 :     | emit_disp _ = error "emit_disp"
351 : monnier 247
352 : leunga 1156 (*#line 568.7 "x86/x86.mdl"*)
353 : george 545 fun stupidGas (I.ImmedLabel lexp) = emit_labexp lexp
354 : leunga 594 | stupidGas opnd =
355 :     ( emit "*";
356 : leunga 744 emit_operand opnd )
357 : george 545
358 : leunga 1156 (*#line 572.7 "x86/x86.mdl"*)
359 : george 555 fun isMemOpnd (I.MemReg _) = true
360 :     | isMemOpnd (I.FDirect f) = true
361 :     | isMemOpnd (I.LabelEA _) = true
362 :     | isMemOpnd (I.Displace _) = true
363 :     | isMemOpnd (I.Indexed _) = true
364 :     | isMemOpnd _ = false
365 :    
366 : leunga 1156 (*#line 578.7 "x86/x86.mdl"*)
367 : leunga 744 fun chop fbinOp =
368 :     let
369 : leunga 1156 (*#line 579.15 "x86/x86.mdl"*)
370 : leunga 744 val n = size fbinOp
371 : leunga 565 in
372 : leunga 744 (case Char.toLower (String.sub (fbinOp, n - 1)) of
373 :     (#"s" | #"l") => String.substring (fbinOp, 0, n - 1)
374 :     | _ => fbinOp
375 : leunga 565 )
376 :     end
377 : george 555
378 : leunga 1156 (*#line 585.7 "x86/x86.mdl"*)
379 : george 889 fun isST0 (I.ST r) = (CellsBasis.registerNum r) = 0
380 : leunga 815 | isST0 _ = false
381 : leunga 565
382 : leunga 1156 (*#line 589.7 "x86/x86.mdl"*)
383 : leunga 731 fun emit_fbinaryOp (binOp, src, dst) = (if (isMemOpnd src)
384 :     then
385 :     ( emit_fbinOp binOp;
386 : leunga 744 emit "\t";
387 :     emit_operand src )
388 : leunga 731 else
389 :     ( emit (chop (asm_fbinOp binOp));
390 : leunga 744 emit "\t";
391 :    
392 : leunga 815 (case (isST0 src, isST0 dst) of
393 : leunga 744 (_, true) =>
394 :     ( emit_operand src;
395 :     emit ", %st" )
396 :     | (true, _) =>
397 :     ( emit "%st, ";
398 :     emit_operand dst )
399 :     | _ => error "emit_fbinaryOp"
400 :     )))
401 : leunga 731
402 : leunga 1156 (*#line 599.7 "x86/x86.mdl"*)
403 : monnier 411 val emit_dst = emit_operand
404 : george 545
405 : leunga 1156 (*#line 600.7 "x86/x86.mdl"*)
406 : monnier 411 val emit_src = emit_operand
407 : george 545
408 : leunga 1156 (*#line 601.7 "x86/x86.mdl"*)
409 : monnier 411 val emit_opnd = emit_operand
410 : george 545
411 : leunga 1156 (*#line 602.7 "x86/x86.mdl"*)
412 : leunga 695 val emit_opnd8 = emit_operand8
413 :    
414 : leunga 1156 (*#line 603.7 "x86/x86.mdl"*)
415 : monnier 411 val emit_rsrc = emit_operand
416 : george 545
417 : leunga 1156 (*#line 604.7 "x86/x86.mdl"*)
418 : monnier 411 val emit_lsrc = emit_operand
419 : george 545
420 : leunga 1156 (*#line 605.7 "x86/x86.mdl"*)
421 : monnier 411 val emit_addr = emit_operand
422 : monnier 247
423 : leunga 1156 (*#line 606.7 "x86/x86.mdl"*)
424 : george 545 val emit_src1 = emit_operand
425 : leunga 731
426 : leunga 1156 (*#line 607.7 "x86/x86.mdl"*)
427 : leunga 731 val emit_ea = emit_operand
428 : leunga 1156
429 :     (*#line 608.7 "x86/x86.mdl"*)
430 :     val emit_count = emit_operand
431 : leunga 594 fun emitInstr' instr =
432 : leunga 744 (case instr of
433 :     I.NOP => emit "nop"
434 :     | I.JMP(operand, list) =>
435 :     ( emit "jmp\t";
436 :     stupidGas operand )
437 :     | I.JCC{cond, opnd} =>
438 :     ( emit "j";
439 :     emit_cond cond;
440 :     emit "\t";
441 :     stupidGas opnd )
442 : blume 839 | I.CALL{opnd, defs, uses, return, cutsTo, mem, pops} =>
443 : leunga 744 ( emit "call\t";
444 : leunga 796 stupidGas opnd;
445 :     emit_region mem;
446 :     emit_defs defs;
447 :     emit_uses uses;
448 : leunga 815 emit_cellset ("return", return);
449 : leunga 796 emit_cutsTo cutsTo )
450 : leunga 744 | I.ENTER{src1, src2} =>
451 :     ( emit "enter\t";
452 :     emit_operand src1;
453 :     emit ", ";
454 :     emit_operand src2 )
455 :     | I.LEAVE => emit "leave"
456 :     | I.RET option =>
457 :     ( emit "ret";
458 :    
459 :     (case option of
460 :     NONE => ()
461 :     | SOME e =>
462 :     ( emit "\t";
463 :     emit_operand e )
464 :     ))
465 :     | I.MOVE{mvOp, src, dst} =>
466 :     ( emit_move mvOp;
467 :     emit "\t";
468 :     emit_src src;
469 :     emit ", ";
470 :     emit_dst dst )
471 :     | I.LEA{r32, addr} =>
472 :     ( emit "leal\t";
473 :     emit_addr addr;
474 :     emit ", ";
475 :     emitCell r32 )
476 :     | I.CMPL{lsrc, rsrc} =>
477 :     ( emit "cmpl\t";
478 :     emit_rsrc rsrc;
479 :     emit ", ";
480 :     emit_lsrc lsrc )
481 :     | I.CMPW{lsrc, rsrc} =>
482 :     ( emit "cmpb\t";
483 :     emit_rsrc rsrc;
484 :     emit ", ";
485 :     emit_lsrc lsrc )
486 :     | I.CMPB{lsrc, rsrc} =>
487 :     ( emit "cmpb\t";
488 :     emit_rsrc rsrc;
489 :     emit ", ";
490 :     emit_lsrc lsrc )
491 :     | I.TESTL{lsrc, rsrc} =>
492 :     ( emit "testl\t";
493 :     emit_rsrc rsrc;
494 :     emit ", ";
495 :     emit_lsrc lsrc )
496 :     | I.TESTW{lsrc, rsrc} =>
497 :     ( emit "testw\t";
498 :     emit_rsrc rsrc;
499 :     emit ", ";
500 :     emit_lsrc lsrc )
501 :     | I.TESTB{lsrc, rsrc} =>
502 :     ( emit "testb\t";
503 :     emit_rsrc rsrc;
504 :     emit ", ";
505 :     emit_lsrc lsrc )
506 :     | I.BITOP{bitOp, lsrc, rsrc} =>
507 :     ( emit_bitOp bitOp;
508 :     emit "\t";
509 :     emit_rsrc rsrc;
510 :     emit ", ";
511 :     emit_lsrc lsrc )
512 :     | I.BINARY{binOp, src, dst} =>
513 :     (case (src, binOp) of
514 :     (I.Direct _, (I.SARL | I.SHRL | I.SHLL | I.SARW | I.SHRW | I.SHLW | I.SARB | I.SHRB | I.SHLB)) =>
515 :    
516 :     ( emit_binaryOp binOp;
517 :     emit "\t%cl, ";
518 :     emit_dst dst )
519 :     | _ =>
520 :     ( emit_binaryOp binOp;
521 :     emit "\t";
522 :     emit_src src;
523 :     emit ", ";
524 :     emit_dst dst )
525 :     )
526 : leunga 1156 | I.SHIFT{shiftOp, src, dst, count} =>
527 :     (case count of
528 :     I.Direct ecx =>
529 :     ( emit_shiftOp shiftOp;
530 :     emit "\t";
531 :     emit_src src;
532 :     emit ", ";
533 :     emit_dst dst )
534 :     | _ =>
535 :     ( emit_shiftOp shiftOp;
536 :     emit "\t";
537 :     emit_src src;
538 :     emit ", ";
539 :     emit_count count;
540 :     emit ", ";
541 :     emit_dst dst )
542 :     )
543 : leunga 797 | I.CMPXCHG{lock, sz, src, dst} =>
544 :     ( (if lock
545 :     then (emit "lock\n\t")
546 :     else ());
547 :     emit "cmpxchg";
548 :    
549 :     (case sz of
550 :     I.I8 => emit "b"
551 :     | I.I16 => emit "w"
552 :     | I.I32 => emit "l"
553 :     );
554 :    
555 :     ( emit "\t";
556 :     emit_src src;
557 :     emit ", ";
558 :     emit_dst dst ) )
559 : leunga 744 | I.MULTDIV{multDivOp, src} =>
560 :     ( emit_multDivOp multDivOp;
561 :     emit "\t";
562 :     emit_src src )
563 :     | I.MUL3{dst, src2, src1} =>
564 : leunga 1156 ( emit "imull\t$";
565 : leunga 815 emitInt32 src2;
566 :     emit ", ";
567 :     emit_src1 src1;
568 :     emit ", ";
569 :     emitCell dst )
570 : leunga 744 | I.UNARY{unOp, opnd} =>
571 :     ( emit_unaryOp unOp;
572 :     emit "\t";
573 :     emit_opnd opnd )
574 :     | I.SET{cond, opnd} =>
575 :     ( emit "set";
576 :     emit_cond cond;
577 :     emit "\t";
578 :     emit_opnd8 opnd )
579 :     | I.CMOV{cond, src, dst} =>
580 :     ( emit "cmov";
581 :     emit_cond cond;
582 :     emit "\t";
583 :     emit_src src;
584 :     emit ", ";
585 :     emitCell dst )
586 :     | I.PUSHL operand =>
587 :     ( emit "pushl\t";
588 :     emit_operand operand )
589 :     | I.PUSHW operand =>
590 :     ( emit "pushw\t";
591 :     emit_operand operand )
592 :     | I.PUSHB operand =>
593 :     ( emit "pushb\t";
594 :     emit_operand operand )
595 : leunga 815 | I.PUSHFD => emit "pushfd"
596 :     | I.POPFD => emit "popfd"
597 : leunga 744 | I.POP operand =>
598 :     ( emit "popl\t";
599 :     emit_operand operand )
600 :     | I.CDQ => emit "cdq"
601 :     | I.INTO => emit "into"
602 :     | I.FBINARY{binOp, src, dst} => emit_fbinaryOp (binOp, src, dst)
603 :     | I.FIBINARY{binOp, src} =>
604 :     ( emit_fibinOp binOp;
605 :     emit "\t";
606 :     emit_src src )
607 :     | I.FUNARY funOp => emit_funOp funOp
608 :     | I.FUCOM operand =>
609 :     ( emit "fucom\t";
610 :     emit_operand operand )
611 :     | I.FUCOMP operand =>
612 :     ( emit "fucomp\t";
613 :     emit_operand operand )
614 :     | I.FUCOMPP => emit "fucompp"
615 :     | I.FCOMPP => emit "fcompp"
616 : leunga 1156 | I.FCOMI operand =>
617 :     ( emit "fcomi\t";
618 :     emit_operand operand )
619 :     | I.FCOMIP operand =>
620 :     ( emit "fcomip\t";
621 :     emit_operand operand )
622 :     | I.FUCOMI operand =>
623 :     ( emit "fucomi\t";
624 :     emit_operand operand )
625 :     | I.FUCOMIP operand =>
626 :     ( emit "fucomip\t";
627 :     emit_operand operand )
628 : leunga 744 | I.FXCH{opnd} =>
629 :     ( emit "fxch\t";
630 :     emitCell opnd )
631 :     | I.FSTPL operand =>
632 :     (case operand of
633 :     I.ST _ =>
634 :     ( emit "fstp\t";
635 :     emit_operand operand )
636 :     | _ =>
637 :     ( emit "fstpl\t";
638 :     emit_operand operand )
639 :     )
640 :     | I.FSTPS operand =>
641 :     ( emit "fstps\t";
642 :     emit_operand operand )
643 :     | I.FSTPT operand =>
644 :     ( emit "fstps\t";
645 :     emit_operand operand )
646 :     | I.FSTL operand =>
647 :     (case operand of
648 :     I.ST _ =>
649 :     ( emit "fst\t";
650 :     emit_operand operand )
651 :     | _ =>
652 :     ( emit "fstl\t";
653 :     emit_operand operand )
654 :     )
655 :     | I.FSTS operand =>
656 :     ( emit "fsts\t";
657 :     emit_operand operand )
658 :     | I.FLD1 => emit "fld1"
659 :     | I.FLDL2E => emit "fldl2e"
660 :     | I.FLDL2T => emit "fldl2t"
661 :     | I.FLDLG2 => emit "fldlg2"
662 :     | I.FLDLN2 => emit "fldln2"
663 :     | I.FLDPI => emit "fldpi"
664 :     | I.FLDZ => emit "fldz"
665 :     | I.FLDL operand =>
666 :     (case operand of
667 :     I.ST _ =>
668 :     ( emit "fld\t";
669 :     emit_operand operand )
670 :     | _ =>
671 :     ( emit "fldl\t";
672 :     emit_operand operand )
673 :     )
674 :     | I.FLDS operand =>
675 :     ( emit "flds\t";
676 :     emit_operand operand )
677 :     | I.FLDT operand =>
678 :     ( emit "fldt\t";
679 :     emit_operand operand )
680 :     | I.FILD operand =>
681 :     ( emit "fild\t";
682 :     emit_operand operand )
683 :     | I.FILDL operand =>
684 :     ( emit "fildl\t";
685 :     emit_operand operand )
686 :     | I.FILDLL operand =>
687 :     ( emit "fildll\t";
688 :     emit_operand operand )
689 :     | I.FNSTSW => emit "fnstsw"
690 :     | I.FENV{fenvOp, opnd} =>
691 :     ( emit_fenvOp fenvOp;
692 :     emit "\t";
693 :     emit_opnd opnd )
694 :     | I.FMOVE{fsize, src, dst} =>
695 :     ( emit "fmove";
696 :     emit_fsize fsize;
697 :     emit "\t";
698 :     emit_src src;
699 :     emit ", ";
700 :     emit_dst dst )
701 :     | I.FILOAD{isize, ea, dst} =>
702 :     ( emit "fiload";
703 :     emit_isize isize;
704 :     emit "\t";
705 :     emit_ea ea;
706 :     emit ", ";
707 :     emit_dst dst )
708 :     | I.FBINOP{fsize, binOp, lsrc, rsrc, dst} =>
709 :     ( emit_fbinOp binOp;
710 :     emit_fsize fsize;
711 :     emit "\t";
712 :     emit_lsrc lsrc;
713 :     emit ", ";
714 :     emit_rsrc rsrc;
715 :     emit ", ";
716 :     emit_dst dst )
717 :     | I.FIBINOP{isize, binOp, lsrc, rsrc, dst} =>
718 :     ( emit_fibinOp binOp;
719 :     emit_isize isize;
720 :     emit "\t";
721 :     emit_lsrc lsrc;
722 :     emit ", ";
723 :     emit_rsrc rsrc;
724 :     emit ", ";
725 :     emit_dst dst )
726 :     | I.FUNOP{fsize, unOp, src, dst} =>
727 :     ( emit_funOp unOp;
728 :     emit_fsize fsize;
729 :     emit "\t";
730 :     emit_src src;
731 :     emit ", ";
732 :     emit_dst dst )
733 : leunga 1156 | I.FCMP{i, fsize, lsrc, rsrc} =>
734 :     ( (if i
735 :     then (emit "fcmpi")
736 :     else (emit "fcmp"));
737 :    
738 :     ( emit_fsize fsize;
739 :     emit "\t";
740 :     emit_lsrc lsrc;
741 :     emit ", ";
742 :     emit_rsrc rsrc ) )
743 : leunga 744 | I.SAHF => emit "sahf"
744 : leunga 815 | I.LAHF => emit "lahf"
745 : leunga 744 | I.SOURCE{} => emit "source"
746 :     | I.SINK{} => emit "sink"
747 :     | I.PHI{} => emit "phi"
748 : leunga 594 )
749 : george 1003 in tab(); emitInstr' instr; nl()
750 :     end (* emitter *)
751 :     and emitInstrIndented i = (indent(); emitInstr i; nl())
752 :     and emitInstrs instrs =
753 : leunga 594 app (if !indent_copies then emitInstrIndented
754 :     else emitInstr) instrs
755 : monnier 411
756 : george 1003 and emitInstr(I.ANNOTATION{i,a}) =
757 :     ( comment(Annotations.toString a);
758 :     nl();
759 :     emitInstr i )
760 :     | emitInstr(I.LIVE{regs, spilled}) =
761 :     comment("live= " ^ CellsBasis.CellSet.toString regs ^
762 :     "spilled= " ^ CellsBasis.CellSet.toString spilled)
763 :     | emitInstr(I.KILL{regs, spilled}) =
764 :     comment("killed:: " ^ CellsBasis.CellSet.toString regs ^
765 :     "spilled:: " ^ CellsBasis.CellSet.toString spilled)
766 :     | emitInstr(I.INSTR i) = emitter i
767 : george 1009 | emitInstr(I.COPY{k=CellsBasis.GP, sz, src, dst, tmp}) =
768 :     emitInstrs(Shuffle.shuffle{tmp=tmp, src=src, dst=dst})
769 :     | emitInstr(I.COPY{k=CellsBasis.FP, sz, src, dst, tmp}) =
770 :     emitInstrs(Shuffle.shufflefp{tmp=tmp, src=src, dst=dst})
771 : george 1003 | emitInstr _ = error "emitInstr"
772 :    
773 : monnier 429 in S.STREAM{beginCluster=init,
774 : monnier 411 pseudoOp=pseudoOp,
775 : george 1003 emit=emitInstr,
776 : george 909 endCluster=fail,
777 : monnier 411 defineLabel=defineLabel,
778 :     entryLabel=entryLabel,
779 :     comment=comment,
780 :     exitBlock=doNothing,
781 : leunga 815 annotation=annotation,
782 :     getAnnotations=getAnnotations
783 : monnier 411 }
784 :     end
785 : monnier 247 end
786 :    

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