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[smlnj] Diff of /sml/trunk/src/MLRISC/x86/emit/x86Asm.sml
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Diff of /sml/trunk/src/MLRISC/x86/emit/x86Asm.sml

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revision 555, Fri Mar 3 16:10:30 2000 UTC revision 565, Sun Mar 5 04:10:18 2000 UTC
# Line 9  Line 9 
9                        structure Shuffle : X86SHUFFLE                        structure Shuffle : X86SHUFFLE
10                           where I = Instr                           where I = Instr
11    
12  (*#line 171.7 "x86/x86.md"*)  (*#line 181.7 "x86/x86.md"*)
13                        structure MemRegs : MEMORY_REGISTERS where I=Instr                        structure MemRegs : MEMORY_REGISTERS where I=Instr
14                       ) : INSTRUCTION_EMITTER =                       ) : INSTRUCTION_EMITTER =
15  struct  struct
# Line 146  Line 146 
146     and emit_move x = emit (asm_move x)     and emit_move x = emit (asm_move x)
147     and asm_fbinOp (I.FADDP) = "faddp"     and asm_fbinOp (I.FADDP) = "faddp"
148       | asm_fbinOp (I.FADDS) = "fadds"       | asm_fbinOp (I.FADDS) = "fadds"
      | asm_fbinOp (I.FIADDS) = "fiadds"  
149       | asm_fbinOp (I.FMULP) = "fmulp"       | asm_fbinOp (I.FMULP) = "fmulp"
150       | asm_fbinOp (I.FMULS) = "fmuls"       | asm_fbinOp (I.FMULS) = "fmuls"
151       | asm_fbinOp (I.FIMULS) = "fimuls"       | asm_fbinOp (I.FCOMS) = "fcoms"
152         | asm_fbinOp (I.FCOMPS) = "fcomps"
153       | asm_fbinOp (I.FSUBP) = "fsubp"       | asm_fbinOp (I.FSUBP) = "fsubp"
154       | asm_fbinOp (I.FSUBS) = "fsubs"       | asm_fbinOp (I.FSUBS) = "fsubs"
      | asm_fbinOp (I.FISUBS) = "fisubs"  
155       | asm_fbinOp (I.FSUBRP) = "fsubrp"       | asm_fbinOp (I.FSUBRP) = "fsubrp"
156       | asm_fbinOp (I.FSUBRS) = "fsubrs"       | asm_fbinOp (I.FSUBRS) = "fsubrs"
      | asm_fbinOp (I.FISUBRS) = "fisubrs"  
157       | asm_fbinOp (I.FDIVP) = "fdivp"       | asm_fbinOp (I.FDIVP) = "fdivp"
158       | asm_fbinOp (I.FDIVS) = "fdivs"       | asm_fbinOp (I.FDIVS) = "fdivs"
      | asm_fbinOp (I.FIDIVS) = "fidivs"  
159       | asm_fbinOp (I.FDIVRP) = "fdivrp"       | asm_fbinOp (I.FDIVRP) = "fdivrp"
160       | asm_fbinOp (I.FDIVRS) = "fdivrs"       | asm_fbinOp (I.FDIVRS) = "fdivrs"
      | asm_fbinOp (I.FIDIVRS) = "fidivrs"  
161       | asm_fbinOp (I.FADDL) = "faddl"       | asm_fbinOp (I.FADDL) = "faddl"
      | asm_fbinOp (I.FIADDL) = "fiaddl"  
162       | asm_fbinOp (I.FMULL) = "fmull"       | asm_fbinOp (I.FMULL) = "fmull"
163       | asm_fbinOp (I.FIMULL) = "fimull"       | asm_fbinOp (I.FCOML) = "fcoml"
164         | asm_fbinOp (I.FCOMPL) = "fcompl"
165       | asm_fbinOp (I.FSUBL) = "fsubl"       | asm_fbinOp (I.FSUBL) = "fsubl"
      | asm_fbinOp (I.FISUBL) = "fisubl"  
166       | asm_fbinOp (I.FSUBRL) = "fsubrl"       | asm_fbinOp (I.FSUBRL) = "fsubrl"
      | asm_fbinOp (I.FISUBRL) = "fisubrl"  
167       | asm_fbinOp (I.FDIVL) = "fdivl"       | asm_fbinOp (I.FDIVL) = "fdivl"
      | asm_fbinOp (I.FIDIVL) = "fidivl"  
168       | asm_fbinOp (I.FDIVRL) = "fdivrl"       | asm_fbinOp (I.FDIVRL) = "fdivrl"
      | asm_fbinOp (I.FIDIVRL) = "fidivrl"  
169     and emit_fbinOp x = emit (asm_fbinOp x)     and emit_fbinOp x = emit (asm_fbinOp x)
170       and asm_fibinOp (I.FIADDS) = "fiadds"
171         | asm_fibinOp (I.FIMULS) = "fimuls"
172         | asm_fibinOp (I.FICOMS) = "ficoms"
173         | asm_fibinOp (I.FICOMPS) = "ficomps"
174         | asm_fibinOp (I.FISUBS) = "fisubs"
175         | asm_fibinOp (I.FISUBRS) = "fisubrs"
176         | asm_fibinOp (I.FIDIVS) = "fidivs"
177         | asm_fibinOp (I.FIDIVRS) = "fidivrs"
178         | asm_fibinOp (I.FIADDL) = "fiaddl"
179         | asm_fibinOp (I.FIMULL) = "fimull"
180         | asm_fibinOp (I.FICOML) = "ficoml"
181         | asm_fibinOp (I.FICOMPL) = "ficompl"
182         | asm_fibinOp (I.FISUBL) = "fisubl"
183         | asm_fibinOp (I.FISUBRL) = "fisubrl"
184         | asm_fibinOp (I.FIDIVL) = "fidivl"
185         | asm_fibinOp (I.FIDIVRL) = "fidivrl"
186       and emit_fibinOp x = emit (asm_fibinOp x)
187     and asm_funOp (I.FABS) = "fabs"     and asm_funOp (I.FABS) = "fabs"
188       | asm_funOp (I.FCHS) = "fchs"       | asm_funOp (I.FCHS) = "fchs"
189       | asm_funOp (I.FSIN) = "fsin"       | asm_funOp (I.FSIN) = "fsin"
# Line 194  Line 203 
203       | asm_fenvOp (I.FNSTENV) = "fnstenv"       | asm_fenvOp (I.FNSTENV) = "fnstenv"
204     and emit_fenvOp x = emit (asm_fenvOp x)     and emit_fenvOp x = emit (asm_fenvOp x)
205    
206  (*#line 173.6 "x86/x86.md"*)  (*#line 183.6 "x86/x86.md"*)
207     val memReg = MemRegs.memReg regmap     val memReg = MemRegs.memReg regmap
208    
209  (*#line 174.6 "x86/x86.md"*)  (*#line 184.6 "x86/x86.md"*)
210     fun emitInt32 i = let     fun emitInt32 i = let
211    
212  (*#line 175.10 "x86/x86.md"*)  (*#line 185.10 "x86/x86.md"*)
213            val s = Int32.toString i            val s = Int32.toString i
214    
215  (*#line 176.10 "x86/x86.md"*)  (*#line 186.10 "x86/x86.md"*)
216            val s = (if (i >= 0)            val s = (if (i >= 0)
217                   then s                   then s
218                   else ("-" ^ (String.substring (s, 1, (size s) - 1))))                   else ("-" ^ (String.substring (s, 1, (size s) - 1))))
# Line 211  Line 220 
220         end         end
221    
222    
223  (*#line 179.6 "x86/x86.md"*)  (*#line 189.6 "x86/x86.md"*)
224     fun emitScale 0 = emit "1"     fun emitScale 0 = emit "1"
225       | emitScale 1 = emit "2"       | emitScale 1 = emit "2"
226       | emitScale 2 = emit "4"       | emitScale 2 = emit "4"
# Line 265  Line 274 
274       | emit_disp (I.ImmedLabel lexp) = emit_labexp lexp       | emit_disp (I.ImmedLabel lexp) = emit_labexp lexp
275       | emit_disp _ = error "emit_disp"       | emit_disp _ = error "emit_disp"
276    
277  (*#line 218.7 "x86/x86.md"*)  (*#line 228.7 "x86/x86.md"*)
278     fun stupidGas (I.ImmedLabel lexp) = emit_labexp lexp     fun stupidGas (I.ImmedLabel lexp) = emit_labexp lexp
279       | stupidGas (I.LabelEA _) = error "stupidGas"       | stupidGas (I.LabelEA _) = error "stupidGas"
280       | stupidGas opnd = emit_operand opnd       | stupidGas opnd = emit_operand opnd
281    
282  (*#line 223.7 "x86/x86.md"*)  (*#line 233.7 "x86/x86.md"*)
283     fun isMemOpnd (I.MemReg _) = true     fun isMemOpnd (I.MemReg _) = true
284       | isMemOpnd (I.FDirect f) = true       | isMemOpnd (I.FDirect f) = true
285       | isMemOpnd (I.LabelEA _) = true       | isMemOpnd (I.LabelEA _) = true
# Line 278  Line 287 
287       | isMemOpnd (I.Indexed _) = true       | isMemOpnd (I.Indexed _) = true
288       | isMemOpnd _ = false       | isMemOpnd _ = false
289    
290  (*#line 229.7 "x86/x86.md"*)  (*#line 239.7 "x86/x86.md"*)
291     fun showFbinOp (fbinOp, src) = emit (if (isMemOpnd src)     fun chop fbinOp = let
           then fbinOp  
           else let  
292    
293  (*#line 233.15 "x86/x86.md"*)  (*#line 240.15 "x86/x86.md"*)
294               val n = size fbinOp               val n = size fbinOp
295            in            in
296               (               (
297                case String.sub (fbinOp, n - 1) of             case Char.toLower (String.sub (fbinOp, n - 1)) of
298                (#"s" | #"t") => String.substring (fbinOp, 0, n - 1)             (#"s" | #"l") => String.substring (fbinOp, 0, n - 1)
299              | _ => fbinOp              | _ => fbinOp
300               )               )
301            end            end
 )  
302    
303  (*#line 239.7 "x86/x86.md"*)  
304    (*#line 246.7 "x86/x86.md"*)
305     val emit_dst = emit_operand     val emit_dst = emit_operand
306    
307  (*#line 240.7 "x86/x86.md"*)  (*#line 247.7 "x86/x86.md"*)
308     val emit_src = emit_operand     val emit_src = emit_operand
309    
310  (*#line 241.7 "x86/x86.md"*)  (*#line 248.7 "x86/x86.md"*)
311     val emit_opnd = emit_operand     val emit_opnd = emit_operand
312    
313  (*#line 242.7 "x86/x86.md"*)  (*#line 249.7 "x86/x86.md"*)
314     val emit_rsrc = emit_operand     val emit_rsrc = emit_operand
315    
316  (*#line 243.7 "x86/x86.md"*)  (*#line 250.7 "x86/x86.md"*)
317     val emit_lsrc = emit_operand     val emit_lsrc = emit_operand
318    
319  (*#line 244.7 "x86/x86.md"*)  (*#line 251.7 "x86/x86.md"*)
320     val emit_addr = emit_operand     val emit_addr = emit_operand
321    
322  (*#line 245.7 "x86/x86.md"*)  (*#line 252.7 "x86/x86.md"*)
323     val emit_src1 = emit_operand     val emit_src1 = emit_operand
324     fun emitInstr instr =     fun emitInstr instr =
325         ( tab ();         ( tab ();
# Line 452  Line 459 
459        | I.INTO => emit "into"        | I.INTO => emit "into"
460        | I.COPY{dst, src, tmp} => emitInstrs (Shuffle.shuffle {regmap=regmap, tmp=tmp, dst=dst, src=src})        | I.COPY{dst, src, tmp} => emitInstrs (Shuffle.shuffle {regmap=regmap, tmp=tmp, dst=dst, src=src})
461        | I.FCOPY{dst, src, tmp} => emitInstrs (Shuffle.shufflefp {regmap=regmap, tmp=tmp, dst=dst, src=src})        | I.FCOPY{dst, src, tmp} => emitInstrs (Shuffle.shufflefp {regmap=regmap, tmp=tmp, dst=dst, src=src})
462        | I.FBINARY{binOp, src, dst} =>        | I.FBINARY{binOp, src, dst} => (if (isMemOpnd src)
463          ( showFbinOp (asm_fbinOp binOp, src);             then
464               ( emit_fbinOp binOp;
465               emit "\t";
466               emit_src src )
467               else
468               ( emit (chop (asm_fbinOp binOp));
469          emit "\t";          emit "\t";
470          emit_src src;          emit_src src;
471          emit ", ";          emit ", ";
472          emit_dst dst )             emit_dst dst ))
473          | I.FIBINARY{binOp, src} =>
474            ( emit_fibinOp binOp;
475            emit "\t";
476            emit_src src )
477        | I.FUNARY funOp => emit_funOp funOp        | I.FUNARY funOp => emit_funOp funOp
478        | I.FUCOMPP => emit "fucompp"        | I.FUCOMPP => emit "fucompp"
       | I.FCOM => emit "fcom"  
479        | I.FCOMPP => emit "fcompp"        | I.FCOMPP => emit "fcompp"
480        | I.FXCH{opnd} =>        | I.FXCH{opnd} =>
481          ( emit "fxch\t";          ( emit "fxch\t";
# Line 476  Line 491 
491        | I.FSTPT operand =>        | I.FSTPT operand =>
492          ( emit "fstps\t";          ( emit "fstps\t";
493          emit_operand operand )          emit_operand operand )
494          | I.FLD1 => emit "fld1"
495          | I.FLDL2E => emit "fldl2e"
496          | I.FLDL2T => emit "fldl2t"
497          | I.FLDLG2 => emit "fldlg2"
498          | I.FLDLN2 => emit "fldln2"
499          | I.FLDPI => emit "fldpi"
500          | I.FLDZ => emit "fldz"
501        | I.FLDL operand =>        | I.FLDL operand =>
502          ( emit "fldl\t";          ( emit "fldl\t";
503          emit_operand operand )          emit_operand operand )
# Line 488  Line 510 
510        | I.FILD operand =>        | I.FILD operand =>
511          ( emit "fild\t";          ( emit "fild\t";
512          emit_operand operand )          emit_operand operand )
513          | I.FILDL operand =>
514            ( emit "fildl\t";
515            emit_operand operand )
516          | I.FILDLL operand =>
517            ( emit "fildll\t";
518            emit_operand operand )
519        | I.FNSTSW => emit "fnstsw"        | I.FNSTSW => emit "fnstsw"
520        | I.FENV{fenvOp, opnd} =>        | I.FENV{fenvOp, opnd} =>
521          ( emit_fenvOp fenvOp;          ( emit_fenvOp fenvOp;

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