762 |
let fun genCmov(dstR, _) = |
let fun genCmov(dstR, _) = |
763 |
let val _ = doExpr(no, dstR, []) (* false branch *) |
let val _ = doExpr(no, dstR, []) (* false branch *) |
764 |
val cc = cmp(true, ty, cc, t1, t2, []) (* compare *) |
val cc = cmp(true, ty, cc, t1, t2, []) (* compare *) |
765 |
in mark(I.CMOV{cond=cond cc, src=operand yes, dst=dstR}, an) |
in mark(I.CMOV{cond=cond cc, src=regOrMem(operand yes), |
766 |
|
dst=dstR}, an) |
767 |
end |
end |
768 |
in dstMustBeReg genCmov |
in dstMustBeReg genCmov |
769 |
end |
end |
902 |
| T.ZX(32,8,T.LOAD(8,ea,mem)) => load8(ea, mem) |
| T.ZX(32,8,T.LOAD(8,ea,mem)) => load8(ea, mem) |
903 |
| T.ZX(32,16,T.LOAD(16,ea,mem)) => load16(ea, mem) |
| T.ZX(32,16,T.LOAD(16,ea,mem)) => load16(ea, mem) |
904 |
|
|
905 |
| T.COND(32, T.CMP(ty, cc, t1, t2), T.LI yes, T.LI no) => |
| T.COND(32, T.CMP(ty, cc, t1, t2), y as T.LI yes, n as T.LI no) => |
906 |
setcc(ty, cc, t1, t2, toInt32 yes, toInt32 no) |
(case !arch of (* PentiumPro and higher has CMOVcc *) |
907 |
|
Pentium => setcc(ty, cc, t1, t2, toInt32 yes, toInt32 no) |
908 |
|
| _ => cmovcc(ty, cc, t1, t2, y, n) |
909 |
|
) |
910 |
| T.COND(32, T.CMP(ty, cc, t1, t2), yes, no) => |
| T.COND(32, T.CMP(ty, cc, t1, t2), yes, no) => |
911 |
(case !arch of (* PentiumPro and higher has CMOVcc *) |
(case !arch of (* PentiumPro and higher has CMOVcc *) |
912 |
Pentium => unknownExp exp |
Pentium => unknownExp exp |