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[smlnj] Log of /sml/trunk/src/MLRISC/x86/omit-frameptr
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Log of /sml/trunk/src/MLRISC/x86/omit-frameptr

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Sticky Revision:
(Current path doesn't exist after revision 2125)

Revision 1334 - Directory Listing
Modified Thu May 22 22:46:30 2003 UTC (16 years, 1 month ago) by mblume
major cleanup: eliminate all non-exhaustive pattern matches

Revision 1156 - Directory Listing
Modified Thu Mar 21 22:01:11 2002 UTC (17 years, 3 months ago) by leunga

     Bug fixes and improvements to x86 and cfg

Revision 1126 - Directory Listing
Modified Thu Mar 7 21:16:28 2002 UTC (17 years, 3 months ago) by blume
implemented generic Controls module and used it for
all compiler flags/tuneable knobs/...;
more command-line options accepted (for setting the above controls);
some minor bug fixes

Revision 1009 - Directory Listing
Modified Wed Jan 9 19:44:22 2002 UTC (17 years, 5 months ago) by george
	Removed the native COPY and FCOPY instructions
	from all the architectures and replaced it with the
	explicit COPY instruction from the previous commit.

	It is now possible to simplify many of the optimizations
	modules that manipulate copies. This has not been
	done in this change.

Revision 1003 - Directory Listing
Modified Fri Dec 7 02:45:32 2001 UTC (17 years, 6 months ago) by george
Changed the representation of instructions from being fully abstract
to being partially concrete. That is to say:

  from
	type instruction

  to
	type instr				(* machine instruction *)

	datatype instruction =
	    LIVE of {regs: C.cellset, spilled: C.cellset}
          | KILL of {regs: C.cellset, spilled: C.cellset}
          | COPYXXX of {k: CB.cellkind, dst: CB.cell list, src: CB.cell list}
          | ANNOTATION of {i: instruction, a: Annotations.annotation}
          | INSTR of instr

This makes the handling of certain special instructions that appear on
all architectures easier and uniform.

LIVE and KILL say that a list of registers are live or killed at the
program point where they appear. No spill code is generated when an
element of the 'regs' field is spilled, but the register is moved to
the 'spilled' (which is present, more for debugging than anything else).

LIVE replaces the (now deprecated) DEFFREG instruction on the alpha.
We used to generate:

	DEFFREG f1
	f1 := f2 + f3
        trapb

but now generate:

	f1 := f2 + f3
	trapb
	LIVE {regs=[f1,f2,f3], spilled=[]}

Furthermore, the DEFFREG (hack) required that all floating point instruction
use all registers mentioned in the instruction. Therefore f1 := f2 + f3,
defines f1 and uses [f1,f2,f3]! This hack is no longer required resulting
in a cleaner alpha implementation. (Hopefully, intel will not get rid of
this architecture).

COPYXXX is intended to replace the parallel COPY and FCOPY  available on
all the architectures. This will result in further simplification of the
register allocator that must be aware of them for coalescing purposes, and
will also simplify certain aspects of the machine description that provides
callbacks related to parallel copies.

ANNOTATION should be obvious, and now INSTR represents the honest to God
machine instruction set!

The <arch>/instructions/<arch>Instr.sml files define certain utility
functions for making porting easier -- essentially converting upper case
to lower case. All machine instructions (of type instr) are in upper case,
and the lower case form generates an MLRISC instruction. For example on
the alpha we have:

  datatype instr =
     LDA of {r:cell, b:cell, d:operand}
   | ...

  val lda : {r:cell, b:cell, d:operand} -> instruction
    ...

where lda is just (INSTR o LDA), etc.

Revision 909 - Directory Listing
Modified Fri Aug 24 17:48:53 2001 UTC (17 years, 10 months ago) by george
removed clusters from MLRISC

Revision 889 - Directory Listing
Modified Thu Jul 19 20:35:20 2001 UTC (17 years, 11 months ago) by george
Substantial simplification in the CELLS interface

Revision 839 - Directory Listing
Modified Thu Jun 7 20:28:44 2001 UTC (18 years ago) by blume
several internal changes related to C calls

Revision 820 - Directory Listing
Added Tue May 8 21:08:10 2001 UTC (18 years, 1 month ago) by george
Initial revision

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