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[smlnj] Diff of /sml/trunk/src/MLRISC/x86/x86.md
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Diff of /sml/trunk/src/MLRISC/x86/x86.md

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revision 545, Thu Feb 24 13:56:44 2000 UTC revision 555, Fri Mar 3 16:10:30 2000 UTC
# Line 110  Line 110 
110     | LabelEA    of LabelExp.labexp     | LabelEA    of LabelExp.labexp
111     | Direct     of $GP     | Direct     of $GP
112     | FDirect    of $FP     | FDirect    of $FP
113       | ST         of $FP
114     | MemReg     of int (* pseudo memory register *)     | MemReg     of int (* pseudo memory register *)
115     | Displace   of {base: $GP, disp:operand, mem:Region.region}     | Displace   of {base: $GP, disp:operand, mem:Region.region}
116     | Indexed    of {base: $GP option, index: $GP, scale:int, disp:operand,     | Indexed    of {base: $GP option, index: $GP, scale:int, disp:operand,
# Line 142  Line 143 
143    
144   (* The Intel manual is incorrect on the description of FDIV and FDIVR *)   (* The Intel manual is incorrect on the description of FDIV and FDIVR *)
145    datatype fbinOp! =    datatype fbinOp! =
146        FADDP  | FADD  | FIADD        FADDP   | FADDS   | FIADDS
147      | FMULP  | FMUL  | FIMUL      | FMULP   | FMULS   | FIMULS
148      | FSUBP  | FSUB  | FISUB    (* ST(1) := ST-ST(1); [pop] *)      | FSUBP   | FSUBS   | FISUBS        (* ST(1) := ST-ST(1); [pop] *)
149      | FSUBRP | FSUBR | FISUBR   (* ST(1) := ST(1)-ST; [pop] *)      | FSUBRP  | FSUBRS  | FISUBRS       (* ST(1) := ST(1)-ST; [pop] *)
150      | FDIVP  | FDIV  | FIDIV    (* ST(1) := ST/ST(1); [pop] *)      | FDIVP   | FDIVS   | FIDIVS        (* ST(1) := ST/ST(1); [pop] *)
151      | FDIVRP | FDIVR | FIDIVR   (* ST(1) := ST(1)/ST; [pop] *)      | FDIVRP  | FDIVRS  | FIDIVRS       (* ST(1) := ST(1)/ST; [pop] *)
152                  | FADDL   | FIADDL
153                  | FMULL   | FIMULL
154                  | FSUBL   | FISUBL        (* ST(1) := ST-ST(1); [pop] *)
155                  | FSUBRL  | FISUBRL       (* ST(1) := ST(1)-ST; [pop] *)
156                  | FDIVL   | FIDIVL        (* ST(1) := ST/ST(1); [pop] *)
157                  | FDIVRL  | FIDIVRL       (* ST(1) := ST(1)/ST; [pop] *)
158    
159    datatype funOp! = FABS | FCHS    datatype funOp! = FABS | FCHS
160                    | FSIN | FCOS | FTAN                    | FSIN | FCOS | FTAN
# Line 187  Line 194 
194         | I.Relative _ => error "emit_operand"         | I.Relative _ => error "emit_operand"
195         | I.Direct r => emit_GP r         | I.Direct r => emit_GP r
196         | I.MemReg r => emit_operand(memReg opn)         | I.MemReg r => emit_operand(memReg opn)
197         | I.FDirect f =>         | I.ST f => emit_FP f
198              let val f' = regmap f         | I.FDirect f => emit_operand(memReg opn)
             in  if f' < (32+8) then emit_FP f' else emit_operand(memReg opn) end  
199         | I.Displace{base,disp,mem,...} =>         | I.Displace{base,disp,mem,...} =>
200             (emit_disp disp; emit "("; emit_GP base; emit ")";             (emit_disp disp; emit "("; emit_GP base; emit ")";
201              emit_region mem)              emit_region mem)
# Line 213  Line 219 
219          | stupidGas(I.LabelEA _) = error "stupidGas"          | stupidGas(I.LabelEA _) = error "stupidGas"
220          | stupidGas opnd = emit_operand opnd          | stupidGas opnd = emit_operand opnd
221    
222         (* Display the floating point binary opcode *)
223          fun isMemOpnd(I.MemReg _) = true
224            | isMemOpnd(I.FDirect f) = true
225            | isMemOpnd(I.LabelEA _) = true
226            | isMemOpnd(I.Displace _) = true
227            | isMemOpnd(I.Indexed _) = true
228            | isMemOpnd _ = false
229          fun showFbinOp(fbinOp, src) =
230            emit(
231              if isMemOpnd src then fbinOp
232              else
233              let val n = size fbinOp
234              in  case String.sub(fbinOp,n-1) of
235                   (#"s" | #"t") => String.substring(fbinOp,0,n-1)
236                  | _ => fbinOp
237              end)
238    
239        val emit_dst = emit_operand        val emit_dst = emit_operand
240        val emit_src = emit_operand        val emit_src = emit_operand
241        val emit_opnd = emit_operand        val emit_opnd = emit_operand
# Line 332  Line 355 
355    
356     (* floating *)     (* floating *)
357      | FBINARY of {binOp:fbinOp, src:operand, dst:operand}      | FBINARY of {binOp:fbinOp, src:operand, dst:operand}
358          ``<binOp>\t<src>, <dst>''          ``<showFbinOp(asm_fbinOp binOp,src)>\t<src>, <dst>''
359    
360      | FUNARY of funOp      | FUNARY of funOp
361          ``<funOp>''          ``<funOp>''
# Line 355  Line 378 
378      | FSTPS of operand      | FSTPS of operand
379          ``fstps\t<operand>''          ``fstps\t<operand>''
380    
381        | FSTPT of operand
382            ``fstps\t<operand>''
383    
384      | FLDL of operand      | FLDL of operand
385          ``fldl\t<operand>''          ``fldl\t<operand>''
386    
387      | FLDS of operand      | FLDS of operand
388          ``flds\t<operand>''          ``flds\t<operand>''
389    
390        | FLDT of operand
391            ``fldt\t<operand>''
392    
393      | FILD of operand      | FILD of operand
394          ``fild\t<operand>''          ``fild\t<operand>''
395    

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