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Revision 1127 - (view) (download) (annotate) - [select for diffs]
Modified Fri Mar 8 01:35:33 2002 UTC (18 years, 10 months ago) by leunga
File length: 20385 byte(s)
Diff to previous 1009

      Bug fixes for CMOVcc on x86

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Revision 1009 - (view) (download) (annotate) - [select for diffs]
Modified Wed Jan 9 19:44:22 2002 UTC (19 years ago) by george
File length: 20230 byte(s)
Diff to previous 1003

	Removed the native COPY and FCOPY instructions
	from all the architectures and replaced it with the
	explicit COPY instruction from the previous commit.

	It is now possible to simplify many of the optimizations
	modules that manipulate copies. This has not been
	done in this change.

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Revision 1003 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 7 02:45:32 2001 UTC (19 years, 1 month ago) by george
File length: 20257 byte(s)
Diff to previous 984

Changed the representation of instructions from being fully abstract
to being partially concrete. That is to say:

  from
	type instruction

  to
	type instr				(* machine instruction *)

	datatype instruction =
	    LIVE of {regs: C.cellset, spilled: C.cellset}
          | KILL of {regs: C.cellset, spilled: C.cellset}
          | COPYXXX of {k: CB.cellkind, dst: CB.cell list, src: CB.cell list}
          | ANNOTATION of {i: instruction, a: Annotations.annotation}
          | INSTR of instr

This makes the handling of certain special instructions that appear on
all architectures easier and uniform.

LIVE and KILL say that a list of registers are live or killed at the
program point where they appear. No spill code is generated when an
element of the 'regs' field is spilled, but the register is moved to
the 'spilled' (which is present, more for debugging than anything else).

LIVE replaces the (now deprecated) DEFFREG instruction on the alpha.
We used to generate:

	DEFFREG f1
	f1 := f2 + f3
        trapb

but now generate:

	f1 := f2 + f3
	trapb
	LIVE {regs=[f1,f2,f3], spilled=[]}

Furthermore, the DEFFREG (hack) required that all floating point instruction
use all registers mentioned in the instruction. Therefore f1 := f2 + f3,
defines f1 and uses [f1,f2,f3]! This hack is no longer required resulting
in a cleaner alpha implementation. (Hopefully, intel will not get rid of
this architecture).

COPYXXX is intended to replace the parallel COPY and FCOPY  available on
all the architectures. This will result in further simplification of the
register allocator that must be aware of them for coalescing purposes, and
will also simplify certain aspects of the machine description that provides
callbacks related to parallel copies.

ANNOTATION should be obvious, and now INSTR represents the honest to God
machine instruction set!

The <arch>/instructions/<arch>Instr.sml files define certain utility
functions for making porting easier -- essentially converting upper case
to lower case. All machine instructions (of type instr) are in upper case,
and the lower case form generates an MLRISC instruction. For example on
the alpha we have:

  datatype instr =
     LDA of {r:cell, b:cell, d:operand}
   | ...

  val lda : {r:cell, b:cell, d:operand} -> instruction
    ...

where lda is just (INSTR o LDA), etc.

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Revision 984 - (view) (download) (annotate) - [select for diffs]
Modified Wed Nov 21 19:00:08 2001 UTC (19 years, 2 months ago) by george
File length: 20004 byte(s)
Diff to previous 889

  Implemented a complete redesign of MLRISC pseudo-ops. Now there
  ought to never be any question of incompatabilities with
  pseudo-op syntax expected by host assemblers.

  For now, only modules supporting GAS syntax are implemented
  but more should follow, such as MASM, and vendor assembler
  syntax, e.g. IBM as, Sun as, etc.

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Revision 889 - (view) (download) (annotate) - [select for diffs]
Modified Thu Jul 19 20:35:20 2001 UTC (19 years, 6 months ago) by george
File length: 19867 byte(s)
Diff to previous 823

Substantial simplification in the CELLS interface

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Revision 823 - (view) (download) (annotate) - [select for diffs]
Modified Tue May 8 21:25:15 2001 UTC (19 years, 8 months ago) by george
File length: 19834 byte(s)
Diff to previous 818

omit frame pointer optimization

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Revision 818 - (view) (download) (annotate) - [select for diffs]
Modified Fri May 4 20:58:47 2001 UTC (19 years, 8 months ago) by blume
File length: 19752 byte(s)
Diff to previous 817

merging changes from devel branch and fixing up some earlier mistakes
(see HISTORY)

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Revision 817 - (view) (download) (annotate) - [select for diffs]
Modified Fri May 4 20:49:25 2001 UTC (19 years, 8 months ago) by leunga
File length: 19069 byte(s)
Diff to previous 815

    FLDS encoding was missing...

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Revision 815 - (view) (download) (annotate) - [select for diffs]
Modified Fri May 4 05:09:10 2001 UTC (19 years, 8 months ago) by leunga
File length: 19024 byte(s)
Diff to previous 804

    Moby related MLRISC changes

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Revision 804 - (view) (download) (annotate) - [select for diffs]
Modified Thu Mar 22 19:37:34 2001 UTC (19 years, 10 months ago) by george
File length: 19817 byte(s)
Diff to previous 796

  support for new x86 FFI

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Revision 796 - (view) (download) (annotate) - [select for diffs]
Modified Tue Mar 6 00:04:33 2001 UTC (19 years, 10 months ago) by leunga
File length: 18832 byte(s)
Diff to previous 776

   Support for alternative control-flow, exception handlers added.

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Revision 776 - (view) (download) (annotate) - [select for diffs]
Modified Fri Jan 12 04:14:06 2001 UTC (20 years ago) by leunga
File length: 18835 byte(s)
Diff to previous 744

   Support for MOV[SZ][BW]L on the x86...

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Revision 744 - (view) (download) (annotate) - [select for diffs]
Modified Fri Dec 8 04:11:42 2000 UTC (20 years, 1 month ago) by leunga
File length: 18667 byte(s)
Diff to previous 731

   A CVS update record!

   Changed type cell from int to datatype, and numerous other changes.
   Affect every client of MLRISC.  Lal says this can be bootstrapped on all
   machines.  See smlnj/HISTORY for details.

   Tag:  leunga-20001207-cell-monster-hack

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Revision 731 - (view) (download) (annotate) - [select for diffs]
Modified Fri Nov 10 22:57:45 2000 UTC (20 years, 2 months ago) by leunga
File length: 19059 byte(s)
Diff to previous 717

A new x86 floating point code generator.  By default it is off.
See HISTORY for details.   CVS tag=leunga-20001110-new-x86-fp

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Revision 717 - (view) (download) (annotate) - [select for diffs]
Modified Sun Nov 5 15:07:51 2000 UTC (20 years, 2 months ago) by george
File length: 17996 byte(s)
Diff to previous 651

support for sqrt and trig functions on the x86

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Revision 651 - (view) (download) (annotate) - [select for diffs]
Modified Thu Jun 1 18:34:03 2000 UTC (20 years, 8 months ago) by monnier
File length: 17844 byte(s)
Diff to previous 606

bring revisions from the vendor branch to the trunk

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Revision 606 - (view) (download) (annotate) - [select for diffs]
Modified Sun Apr 9 23:10:59 2000 UTC (20 years, 9 months ago) by leunga
File length: 17844 byte(s)
Diff to previous 583

   Assembly fix for x86 and other miscellaneous changes to MLRISC

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Revision 583 - (view) (download) (annotate) - [select for diffs]
Modified Thu Mar 23 21:52:30 2000 UTC (20 years, 10 months ago) by leunga
File length: 17829 byte(s)
Diff to previous 565

1. X86 fixes/changes

   a.  The old code generated for SETcc was completely wrong.
       The Intel optimization guide is VERY misleading.

2. ALPHA fixes/changes

   a.  Added the instructions LDBU, LDWU, STB, STW as per Fermin's suggestion.
   b.  Added a new mode byteWordLoadStores to the functor parameter to Alpha()
   c.  Added reassociation code for address computation.

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Revision 565 - (view) (download) (annotate) - [select for diffs]
Modified Sun Mar 5 04:10:18 2000 UTC (20 years, 10 months ago) by leunga
File length: 16396 byte(s)
Diff to previous 555

Fix up a few floating point bugs on the x86 that are discovered by Fermin.
Rewritten the Sethi-Ullman code.  Added new FP instructions to the x86,
including FIxxxx, FCOMxx, and FLDxx.

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Revision 555 - (view) (download) (annotate) - [select for diffs]
Modified Fri Mar 3 16:10:30 2000 UTC (20 years, 10 months ago) by george
File length: 14912 byte(s)
Diff to previous 545

lal-20000303-new mltree -- take II

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Revision 545 - (view) (download) (annotate) - [select for diffs]
Modified Thu Feb 24 13:56:44 2000 UTC (20 years, 11 months ago) by george
File length: 14967 byte(s)
Diff to previous 499

  Changes to MLTREE

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Revision 499 - (view) (download) (annotate) - [select for diffs]
Modified Tue Dec 7 15:44:50 1999 UTC (21 years, 1 month ago) by monnier
File length: 13276 byte(s)
Copied from: sml/branches/SMLNJ/src/MLRISC/x86/x86MC.sml revision 498
Diff to previous 498

This commit was generated by cvs2svn to compensate for changes in r498,
which included commits to RCS files with non-trunk default branches.

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Revision 498 - (view) (download) (annotate) - [select for diffs]
Modified Tue Dec 7 15:44:50 1999 UTC (21 years, 1 month ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/x86/x86MC.sml
File length: 13276 byte(s)
Diff to previous 429

version 110.25

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Revision 429 - (view) (download) (annotate) - [select for diffs]
Modified Wed Sep 8 09:47:00 1999 UTC (21 years, 4 months ago) by monnier
Original Path: sml/branches/SMLNJ/src/MLRISC/x86/x86MC.sml
File length: 12944 byte(s)
Diff to previous 410

version 110.21

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Revision 410 - (view) (download) (annotate) - [select for diffs]
Modified Fri Sep 3 00:25:03 1999 UTC (21 years, 4 months ago) by
Original Path: sml/branches/SMLNJ/src/MLRISC/x86/x86MC.sml
File length: 12713 byte(s)
Copied from: sml/trunk/src/MLRISC/x86/x86MC.sml revision 409
Diff to previous 409

This commit was manufactured by cvs2svn to create branch 'SMLNJ'.

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Revision 409 - (view) (download) (annotate) - [select for diffs]
Added Fri Sep 3 00:21:52 1999 UTC (21 years, 4 months ago) by monnier
File length: 12713 byte(s)

Initial revision