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[smlnj] Diff of /sml/trunk/src/compiler/CodeGen/alpha32/alpha32CpsRegs.sml
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Diff of /sml/trunk/src/compiler/CodeGen/alpha32/alpha32CpsRegs.sml

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revision 1333, Thu May 22 17:12:13 2003 UTC revision 1334, Thu May 22 22:46:30 2003 UTC
# Line 43  Line 43 
43    val floatregs = map FREG (0 upto 28)    val floatregs = map FREG (0 upto 28)
44    val savedfpregs = []    val savedfpregs = []
45    
46    val availR =    val availR = let
47        map (fn T.REG(_,r) => r)        fun get (T.REG (_, r)) = r
48            | get _ = MLRiscErrorMsg.error ("Alpha32CpsRegs","availR:get")
49      in
50          map get
51            ([gcLink(false), T.REG(32, exhaustedR),            ([gcLink(false), T.REG(32, exhaustedR),
52              stdlink(false), stdclos(false), stdarg(false), stdcont(false)] @ miscregs)              stdlink(false), stdclos(false), stdarg(false), stdcont(false)]
53               @ miscregs)
54      end
55    
56    local    local
57        structure SC = CellsBasis.SortedCells        structure SC = CellsBasis.SortedCells

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