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[smlnj] Diff of /sml/trunk/src/compiler/CodeGen/alpha32x/alpha32xCG.sml
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Diff of /sml/trunk/src/compiler/CodeGen/alpha32x/alpha32xCG.sml

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revision 113, Fri Jun 5 19:41:21 1998 UTC revision 139, Mon Sep 7 21:11:35 1998 UTC
# Line 18  Line 18 
18    structure C = Alpha32Cells    structure C = Alpha32Cells
19    structure R = Alpha32CpsRegs    structure R = Alpha32CpsRegs
20    structure MLTree = Alpha32MLTree    structure MLTree = Alpha32MLTree
21      structure B = Alpha32MLTree.BNames
22    structure Region = Alpha32Instr.Region    structure Region = Alpha32Instr.Region
23    
24    fun error msg = ErrorMsg.impossible ("Alpha32CG." ^ msg)    fun error msg = ErrorMsg.impossible ("Alpha32CG." ^ msg)
# Line 89  Line 90 
90      fun mvInstr(rd, rs) = I.OPERATE{oper=I.BIS, ra=rs, rb=I.REGop 31, rc=rd}      fun mvInstr(rd, rs) = I.OPERATE{oper=I.BIS, ra=rs, rb=I.REGop 31, rc=rd}
91      fun fmvInstr(fd, fs) = I.FOPERATE{oper=I.CPYS, fa=fs, fb=fs, fc=fd}      fun fmvInstr(fd, fs) = I.FOPERATE{oper=I.CPYS, fa=fs, fb=fs, fc=fd}
92    
93      fun spill (stClass, stOp, getLoc, newReg, rewrite) {regmap, instr, reg} = let      fun spill (stClass, stOp, getLoc, newReg, rewrite) {regmap, instr, reg, id:B.name} = let
94        val offset = getLoc(reg)        val offset = getLoc(reg)
95        fun spillInstr(src) =        fun spillInstr(src) =
96          [stClass{stOp=stOp, r=src, b=C.stackptrR, d=I.IMMop offset, mem=stack}]          [stClass{stOp=stOp, r=src, b=C.stackptrR, d=I.IMMop offset, mem=stack}]
# Line 125  Line 126 
126      end      end
127    
128    
129      fun reload (ldClass, ldOp, getLoc, newReg, rewrite) {regmap, instr, reg} = let      fun reload (ldClass, ldOp, getLoc, newReg, rewrite) {regmap, instr, reg, id:B.name} = let
130        val offset = I.IMMop (getLoc(reg))        val offset = I.IMMop (getLoc(reg))
131        fun reloadInstr(dst, rest) =        fun reloadInstr(dst, rest) =
132          ldClass{ldOp=ldOp, r=dst, b=C.stackptrR, d=offset, mem=stack}::rest          ldClass{ldOp=ldOp, r=dst, b=C.stackptrR, d=offset, mem=stack}::rest
# Line 161  Line 162 
162        Alpha32Ra.IntRa        Alpha32Ra.IntRa
163          (structure RaUser = struct          (structure RaUser = struct
164             structure I = Alpha32Instr             structure I = Alpha32Instr
165               structure B = B
166    
167             val getreg = GR.getreg             val getreg = GR.getreg
168             val spill = spill(I.STORE, I.STL, getRegLoc, C.newReg,             val spill = spill(I.STORE, I.STL, getRegLoc, C.newReg,
# Line 178  Line 180 
180        Alpha32Ra.FloatRa        Alpha32Ra.FloatRa
181          (structure RaUser = struct          (structure RaUser = struct
182             structure I = Alpha32Instr             structure I = Alpha32Instr
183               structure B = B
184    
185             val getreg = FR.getreg             val getreg = FR.getreg
186             val spill = spill (I.FSTORE, I.STT, getFregLoc, C.newFreg,             val spill = spill (I.FSTORE, I.STT, getFregLoc, C.newFreg,
# Line 229  Line 232 
232    
233    
234  (*  (*
235   * $Log$   * $Log: alpha32xCG.sml,v $
236     * Revision 1.3  1998/05/23 14:09:14  george
237     *   Fixed RCS keyword syntax
238     *
239   *)   *)

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  Added in v.139

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