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[smlnj] Annotation of /sml/trunk/src/compiler/CodeGen/sparc/sparcCpsRegs.sml
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Annotation of /sml/trunk/src/compiler/CodeGen/sparc/sparcCpsRegs.sml

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1 : monnier 134 (* sparcCpsRegs.sml --- CPS registerS USED ON the Sparc
2 :     *
3 :     * COPYRIGHT (c) 1998 AT&T Bell Laboratories.
4 :     *
5 :     *)
6 :    
7 :     structure SparcCpsRegs : CPSREGS =
8 :     struct
9 :     structure T = SparcMLTree
10 :     structure SL = SortedList
11 :    
12 :     val stdarg = T.REG 24 (* %i0 *)
13 :     val stdcont = T.REG 25 (* %i1 *)
14 :     val stdclos = T.REG 26 (* %i2 *)
15 :     val stdlink = T.REG 1 (* %g1 *)
16 :     val baseptr = T.REG 27 (* %i3 *)
17 :     val maskreg = T.REG 13 (* %o5 *)
18 :    
19 :     val limitptr = T.REG 4 (* %g4 *)
20 :     val varptr = T.REG 29 (* %i5 *)
21 :     val exhausted = SOME(T.CC 65) (* %psr *)
22 :     val storeptr = T.REG 5 (* %g5 *)
23 :     val allocptr = T.REG 6 (* %g6 *)
24 :     val exnptr = T.REG 7 (* %g7 *)
25 :    
26 :     val returnPtr = 15
27 :     val gclinkreg = T.REG returnPtr
28 :     val stackptr = T.REG 14
29 :    
30 :     (* Warning %o2 is used as the asmTmp
31 :     *)
32 :     val miscregs = (* %g2-%g3, %o0-%o1, %l0-%l7, %i4, %o3-%o4 *)
33 :     map T.REG [2, 3, 8, 9, 16, 17, 18, 19, 20, 21, 22, 23, 28, 11, 12]
34 :     val calleesave = Array.fromList miscregs
35 :    
36 :     (* Note: We need at least one register for shuffling purposes. *)
37 :     fun fromto(n, m, inc) = if n>m then [] else n :: fromto(n+inc, m, inc)
38 :     val floatregs = map T.FREG (fromto(0,31,2))
39 :     val savedfpregs = []
40 :    
41 :     val allRegs = SL.uniq(fromto(0,31,1))
42 :    
43 :     val availR =
44 :     map (fn T.REG r => r)
45 :     ([stdlink, stdclos, stdarg, stdcont, gclinkreg, maskreg] @ miscregs)
46 :     val dedicatedR = SL.remove(SL.uniq availR, allRegs)
47 :    
48 :     val availF = SL.uniq(fromto(0, 30, 2))
49 :     val dedicatedF = []
50 :     end
51 :    
52 :     (*
53 :     * $Log$
54 :     *)

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