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| 1 : | monnier | 245 | (* sparcCpsRegs.sml --- CPS registerS USED ON the Sparc |
| 2 : | * | ||
| 3 : | * COPYRIGHT (c) 1998 AT&T Bell Laboratories. | ||
| 4 : | * | ||
| 5 : | *) | ||
| 6 : | |||
| 7 : | structure SparcCpsRegs : CPSREGS = | ||
| 8 : | struct | ||
| 9 : | structure T = SparcMLTree | ||
| 10 : | monnier | 411 | structure C = SparcCells |
| 11 : | monnier | 245 | |
| 12 : | monnier | 411 | val GP = C.GPReg |
| 13 : | val FP = C.FPReg | ||
| 14 : | monnier | 245 | |
| 15 : | george | 555 | fun REG r = T.REG(32,GP r) |
| 16 : | fun FREG f = T.FREG(64,FP f) | ||
| 17 : | monnier | 245 | |
| 18 : | blume | 840 | val returnPtr = GP 15 |
| 19 : | |||
| 20 : | local | ||
| 21 : | val stdarg0 = REG(24) (* %i0 *) | ||
| 22 : | val stdcont0 = REG(25) (* %i1 *) | ||
| 23 : | val stdclos0 = REG(26) (* %i2 *) | ||
| 24 : | val stdlink0 = REG(1) (* %g1 *) | ||
| 25 : | val baseptr0 = REG(27) (* %i3 *) | ||
| 26 : | val limitptr0 = REG(4) (* %g4 *) | ||
| 27 : | val varptr0 = REG(29) (* %i5 *) | ||
| 28 : | val storeptr0 = REG(5) (* %g5 *) | ||
| 29 : | val exnptr0 = REG(7) (* %g7 *) | ||
| 30 : | val gcLink0 = T.REG(32,returnPtr) | ||
| 31 : | val frameptr0 = REG(30) | ||
| 32 : | in | ||
| 33 : | val vfp = SparcCells.newReg() | ||
| 34 : | val vfptr = T.REG(32, vfp) | ||
| 35 : | george | 823 | |
| 36 : | blume | 840 | fun stdarg _ = stdarg0 |
| 37 : | fun stdcont _ = stdcont0 | ||
| 38 : | fun stdclos _ = stdclos0 | ||
| 39 : | fun stdlink _ = stdlink0 | ||
| 40 : | fun baseptr _ = baseptr0 | ||
| 41 : | monnier | 245 | |
| 42 : | blume | 840 | fun limitptr _ = limitptr0 |
| 43 : | fun varptr _ = varptr0 | ||
| 44 : | val exhausted = SOME(T.CC(T.GTU,C.psr)) (* %psr *) | ||
| 45 : | fun storeptr _ = storeptr0 | ||
| 46 : | val allocptr = REG(6) (* %g6 *) | ||
| 47 : | fun exnptr _ = exnptr0 | ||
| 48 : | george | 546 | |
| 49 : | blume | 840 | fun gcLink _ = gcLink0 |
| 50 : | monnier | 411 | |
| 51 : | blume | 840 | fun frameptr _ = frameptr0 |
| 52 : | |||
| 53 : | (* Warning %o2 is used as the asmTmp | ||
| 54 : | *) | ||
| 55 : | val miscregs = | ||
| 56 : | map REG | ||
| 57 : | monnier | 411 | [2, 3, (* %g2-%g3 *) |
| 58 : | monnier | 245 | 8, 9, (* %o0-%o1 *) |
| 59 : | 16, 17, 18, 19, 20, 21, 22, 23, (* %l0-%l7 *) | ||
| 60 : | 28, 31, (* %i4, %i6, %i7 *) | ||
| 61 : | 11, 12, 13] (* %o3-%o5 *) | ||
| 62 : | blume | 840 | val calleesave = Array.fromList miscregs |
| 63 : | monnier | 245 | |
| 64 : | blume | 840 | (* Note: We need at least one register for shuffling purposes. *) |
| 65 : | fun fromto(n, m, inc) = if n>m then [] else n :: fromto(n+inc, m, inc) | ||
| 66 : | val floatregs = map FREG (fromto(0,31,2)) | ||
| 67 : | val savedfpregs = [] | ||
| 68 : | monnier | 245 | |
| 69 : | blume | 840 | local |
| 70 : | fun unREG (T.REG (_, r)) = r | ||
| 71 : | | unREG _ = raise Fail "sparcCpsRegs:unREG" | ||
| 72 : | structure SC = SparcCells.SortedCells | ||
| 73 : | val -- = SC.difference | ||
| 74 : | infix -- | ||
| 75 : | in | ||
| 76 : | val availR = | ||
| 77 : | map unREG ([stdlink0, stdclos0, stdarg0, stdcont0, gcLink0] | ||
| 78 : | @ miscregs) | ||
| 79 : | monnier | 245 | |
| 80 : | blume | 840 | val allRegs = map GP (fromto(0, 31, 1)) |
| 81 : | val dedicatedR = SC.return (SC.uniq allRegs -- SC.uniq availR) | ||
| 82 : | blume | 733 | |
| 83 : | blume | 840 | val availF = map FP (fromto(0, 30, 2)) |
| 84 : | val dedicatedF = [] | ||
| 85 : | blume | 733 | |
| 86 : | blume | 840 | val signedGCTest = false |
| 87 : | val addressWidth = 32 | ||
| 88 : | |||
| 89 : | val ccallCallerSaveR = | ||
| 90 : | map unREG [limitptr0, storeptr0, exnptr0, allocptr] | ||
| 91 : | val ccallCallerSaveF = [] | ||
| 92 : | end (*local*) | ||
| 93 : | end (* local *) | ||
| 94 : | monnier | 245 | end |
| 95 : |
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