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[smlnj] Annotation of /sml/trunk/src/runtime/kernel/ml-state.c
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Annotation of /sml/trunk/src/runtime/kernel/ml-state.c

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Original Path: sml/branches/SMLNJ/src/runtime/kernel/ml-state.c

1 : monnier 2 /* ml-state.c
2 :     *
3 :     * COPYRIGHT (c) 1993 by AT&T Bell Laboratories.
4 :     *
5 :     */
6 :    
7 :     #include <stdarg.h>
8 :     #include "ml-base.h"
9 :     #include "vproc-state.h"
10 :     #include "ml-state.h"
11 :     #include "system-signals.h"
12 :     #include "tags.h"
13 :     #include "ml-values.h"
14 :     #include "ml-objects.h"
15 :     #include "ml-globals.h"
16 :     #include "gc.h"
17 :     #include "ml-timer.h"
18 :     #include "ml-limits.h"
19 :    
20 :    
21 :     vproc_state_t *VProc[MAX_NUM_PROCS];
22 :     int NumVProcs;
23 :    
24 :    
25 :     /* local routines */
26 :     PVT void InitVProcState (vproc_state_t *vsp);
27 :    
28 :    
29 :     /* This table maps the register numbers of the code generator to the proper
30 :     * indices of the root vector. The order of entries in this table must
31 :     * respect both the MLState vector layout and the order of the miscregs in
32 :     * the C-machine implementation. The pc, varptr, and exncont are not included.
33 :     */
34 :     int ArgRegMap[N_ARG_REGS] = {
35 :     LINK_INDX, CLOSURE_INDX, ARG_INDX, CONT_INDX, /* the standard arg registers */
36 :     #if defined(TARGET_SPARC)
37 : monnier 139 /* misc. regs = %g2-%g3, %o1-%o2, %l0-%l7, %i4; %o3-%o4 */
38 :     /* 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 */
39 :     MISC0_INDX, MISC1_INDX, MISC2_INDX, MISC3_INDX, MISC4_INDX,
40 :     MISC5_INDX, MISC6_INDX, MISC7_INDX, MISC8_INDX, MISC9_INDX,
41 :     MISC10_INDX, MISC11_INDX, MISC12_INDX, MISC13_INDX, MISC14_INDX
42 : monnier 2 #elif defined(TARGET_M68)
43 :     5
44 :     #elif defined(TARGET_MIPS)
45 :     6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18
46 :     #elif defined(TARGET_HPPA)
47 :     MISC0_INDX, MISC1_INDX, MISC2_INDX, MISC3_INDX, MISC4_INDX,
48 :     MISC5_INDX, MISC6_INDX, MISC7_INDX, MISC8_INDX, MISC9_INDX,
49 : monnier 106 MISC10_INDX, MISC11_INDX, MISC12_INDX, MISC13_INDX, MISC14_INDX,
50 :     MISC15_INDX
51 : monnier 2 #elif defined(TARGET_ALPHA32)
52 :     MISC0_INDX,MISC1_INDX,MISC2_INDX,MISC3_INDX,MISC4_INDX,
53 :     MISC5_INDX,MISC6_INDX,MISC7_INDX,MISC8_INDX,MISC9_INDX,
54 :     MISC10_INDX,MISC11_INDX,MISC12_INDX,MISC13_INDX
55 : monnier 235 #elif (defined(TARGET_PPC) || defined(TARGET_RS6000))
56 :     MISC0_INDX,MISC1_INDX,MISC2_INDX,MISC3_INDX,MISC4_INDX,
57 :     MISC5_INDX,MISC6_INDX,MISC7_INDX,MISC8_INDX,MISC9_INDX,
58 :     MISC10_INDX,MISC11_INDX,MISC12_INDX,MISC13_INDX,MISC14_INDX
59 : monnier 2 #elif defined(TARGET_X86)
60 :     7, 8, 9,
61 :     /* virtual registers */
62 :     10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25
63 :     #elif defined(TARGET_BYTECODE)
64 :     4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
65 :     #elif defined(TARGET_C)
66 :     /* this is really defunct */
67 :     6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
68 :     22, 23, 24, 25, 26
69 :     #else
70 :     # error ArgRegMap not defined for target architecture
71 :     #endif
72 :     };
73 :    
74 :    
75 :     /* AllocMLState:
76 :     */
77 :     ml_state_t *AllocMLState (bool_t isBoot, heap_params_t *heapParams)
78 :     {
79 :     ml_state_t *msp;
80 :     int i;
81 :    
82 :     #ifdef MP_SUPPORT
83 :     for (i = 0; i < MAX_NUM_PROCS; i++) {
84 :     if (((VProc[i] = NEW_OBJ(vproc_state_t)) == NIL(vproc_state_t *))
85 :     || ((msp = NEW_OBJ(ml_state_t)) == NIL(ml_state_t *))) {
86 :     Die ("unable to allocate ML state vectors");
87 :     }
88 :     VProc[i]->vp_state = msp;
89 :     }
90 :     msp = VProc[0]->vp_state;
91 :     #else
92 :     if (((VProc[0] = NEW_OBJ(vproc_state_t)) == NIL (vproc_state_t *))
93 :     || ((msp = NEW_OBJ(ml_state_t)) == NIL(ml_state_t *))) {
94 :     Die ("unable to allocate ML state vector");
95 :     }
96 :     VProc[0]->vp_state = msp;
97 :     #endif /* MP_SUPPORT */
98 :    
99 :     /* allocate and initialize the heap data structures */
100 :     InitHeap (msp, isBoot, heapParams);
101 :    
102 :     #ifdef MP_SUPPORT
103 :     /* partition the allocation arena given by InitHeap among the
104 :     * MAX_NUM_PROCS processors.
105 :     */
106 :     NumVProcs = MAX_NUM_PROCS;
107 :     PartitionAllocArena(VProc);
108 :     /* initialize the per-processor ML state */
109 :     for (i = 0; i < MAX_NUM_PROCS; i++) {
110 :     int j;
111 :    
112 :     InitVProcState (VProc[i]);
113 :     /* single timers are currently shared among multiple processors */
114 :     if (i != 0) {
115 :     VProc[i]->vp_gcTime0 = VProc[0]->vp_gcTime0;
116 :     VProc[i]->vp_gcTime = VProc[0]->vp_gcTime;
117 :     }
118 :     }
119 :     /* initialize the first processor here */
120 :     VProc[0]->vp_mpSelf = MP_ProcId ();
121 :     VProc[0]->vp_mpState = MP_PROC_RUNNING;
122 :     #else
123 :     InitVProcState (VProc[0]);
124 :     NumVProcs = 1;
125 :     #endif /* MP_SUPPORT */
126 :    
127 :     /* initialize the timers */
128 :     /** MP_SUPPORT note: for now, only proc 0 has timers **/
129 :     ResetTimers (VProc[0]);
130 :    
131 :     return msp;
132 :    
133 :     } /* end of AllocMLState */
134 :    
135 :     /* InitVProcState:
136 :     */
137 :     PVT void InitVProcState (vproc_state_t *vsp)
138 :     {
139 :     int i;
140 :    
141 :     vsp->vp_heap = vsp->vp_state->ml_heap;
142 :     vsp->vp_state->ml_vproc = vsp;
143 :     vsp->vp_inMLFlag = FALSE;
144 :     vsp->vp_handlerPending = FALSE;
145 :     vsp->vp_inSigHandler = FALSE;
146 :     vsp->vp_numPendingSysSigs = 0;
147 :     vsp->vp_numPendingSigs = 0;
148 :     vsp->vp_sigCode = 0;
149 :     vsp->vp_sigCount = 0;
150 :     vsp->vp_nextPendingSig = 0;
151 :     vsp->vp_numInQ = 0;
152 :     vsp->vp_gcSigState = ML_SIG_IGNORE;
153 :     vsp->vp_gcTime0 = NEW_OBJ(Time_t);
154 :     vsp->vp_gcTime = NEW_OBJ(Time_t);
155 :    
156 :     for (i = 0; i < NUM_SIGS; i++) {
157 :     vsp->vp_pendingSigQ[i].sigNum = 0;
158 :     vsp->vp_pendingSigQ[i].count = 0;
159 :     }
160 :    
161 :     /* initialize the ML state, including the roots */
162 :     InitMLState (vsp->vp_state);
163 :     for (i = 0; i < NROOTS; i++) {
164 :     vsp->vp_state->ml_roots[i] = ML_unit;
165 :     }
166 :    
167 :     #ifdef MP_SUPPORT
168 :     vsp->vp_mpSelf = 0;
169 :     vsp->vp_mpState = MP_PROC_NO_PROC;
170 :     #endif
171 :    
172 :     } /* end of InitVProcState */
173 :    
174 :     /* InitMLState:
175 :     *
176 :     * Initialize the ML State vector. Note that we do not initialize the root
177 :     * registers here, since this is sometimes called when the roots are live (from
178 :     * ML_ApplyFn).
179 :     */
180 :     void InitMLState (ml_state_t *msp)
181 :     {
182 :     int i;
183 :    
184 :     msp->ml_storePtr = ML_unit;
185 :     msp->ml_liveRegMask = 0;
186 :     #ifdef SOFT_POLL
187 :     msp->ml_pollPending = FALSE;
188 :     msp->ml_inPollHandler = FALSE;
189 :     #endif
190 :    
191 :     #ifdef N_PSEUDO_REGS
192 :     for (i = 0; i < N_PSEUDO_REGS; i++)
193 :     msp->ml_pseudoRegs[i] = ML_unit;
194 :     #endif
195 :    
196 :     } /* end of InitMLState. */
197 :    
198 :     /* SaveCState:
199 :     *
200 :     * Build a return closure that will save a collection of ML values
201 :     * being used by C. The ML values are passed by reference, with NIL
202 :     * as termination.
203 :     */
204 :     void SaveCState (ml_state_t *msp, ...)
205 :     {
206 :     va_list ap;
207 :     int n, i;
208 :     ml_val_t *vp;
209 :     extern ml_val_t return_a[];
210 :    
211 :     va_start (ap, msp);
212 :     for (n = 0; (vp = va_arg(ap, ml_val_t *)) != NIL(ml_val_t *); n++)
213 :     continue;
214 :     va_end (ap);
215 :    
216 :     va_start (ap, msp);
217 :     #if (CALLEESAVE > 0)
218 :     ML_AllocWrite (msp, 0, MAKE_DESC(n, DTAG_record));
219 :     i = 1;
220 :     #else
221 :     n++;
222 :     ML_AllocWrite (msp, 0, MAKE_DESC(n, DTAG_record));
223 :     ML_AllocWrite (msp, 1, PTR_CtoML(return_a));
224 :     i = 2;
225 :     #endif
226 :     for (; i <= n; i++) {
227 :     vp = va_arg (ap, ml_val_t *);
228 :     ML_AllocWrite (msp, i, *vp);
229 :     }
230 :     #if (CALLEESAVE > 0)
231 :     msp->ml_calleeSave(0) = ML_Alloc(msp, n);
232 :     msp->ml_cont = PTR_CtoML(return_c);
233 :     #else
234 :     msp->ml_cont = ML_Alloc(msp, n);
235 :     #endif
236 :     va_end (ap);
237 :    
238 :     } /* end of SaveCState */
239 :    
240 :     /* RestoreCState:
241 :     *
242 :     * Restore a collection of ML values from the return closure.
243 :     */
244 :     void RestoreCState (ml_state_t *msp, ...)
245 :     {
246 :     va_list ap;
247 :     int n, i;
248 :     ml_val_t *vp;
249 :     ml_val_t savedState;
250 :    
251 :     va_start (ap, msp);
252 :     #if (CALLEESAVE > 0)
253 :     savedState = msp->ml_calleeSave(0);
254 :     i = 0;
255 :     #else
256 :     savedState = msp->ml_cont;
257 :     i = 1;
258 :     #endif
259 :     n = OBJ_LEN(savedState);
260 :     for (; i < n; i++) {
261 :     vp = va_arg (ap, ml_val_t *);
262 :     *vp = REC_SEL(savedState, i);
263 :     }
264 :     va_end (ap);
265 :    
266 :     } /* end of RestoreCState */
267 :    

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