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[smlnj] Diff of /MLRISC/trunk/amd64/ra/amd64RegAlloc.sml
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Diff of /MLRISC/trunk/amd64/ra/amd64RegAlloc.sml

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revision 2929, Fri Jan 18 20:40:28 2008 UTC revision 2998, Sat Apr 19 01:31:01 2008 UTC
# Line 104  Line 104 
104    
105      fun removeDeadCode(cfg as Graph.GRAPH graph) = let      fun removeDeadCode(cfg as Graph.GRAPH graph) = let
106          val blocks = #nodes graph ()          val blocks = #nodes graph ()
107          val find = IntHashTable.find deadRegs          fun isDead r = Option.isSome (IntHashTable.find deadRegs (CB.cellId r))
108          fun isDead r =          fun isAffected i = Option.getOpt (IntHashTable.find affectedBlocks i, false)
             case find (CB.cellId r) of  
                SOME _ => true  
             |  NONE   => false  
         fun isAffected i = getOpt (IntHashTable.find affectedBlocks i, false)  
109          fun isDeadInstr(I.ANNOTATION{i, ...}) = isDeadInstr i          fun isDeadInstr(I.ANNOTATION{i, ...}) = isDeadInstr i
110            | isDeadInstr(I.INSTR(I.MOVE{dst=I.Direct (_,rd), ...})) = isDead rd            | isDeadInstr(I.INSTR(I.MOVE{dst=I.Direct (_,rd), ...})) = isDead rd
111              | isDeadInstr(I.INSTR(I.FMOVE{dst=I.FDirect rd, ...})) = isDead rd
112            | isDeadInstr(I.COPY{k=CB.GP, dst=[rd], ...}) = isDead rd            | isDeadInstr(I.COPY{k=CB.GP, dst=[rd], ...}) = isDead rd
113              | isDeadInstr(I.COPY{k=CB.FP, dst=[rd], ...}) = isDead rd
114            | isDeadInstr _ = false            | isDeadInstr _ = false
115          fun scan [] = ()          fun scan [] = ()
116            | scan((blknum, CFG.BLOCK{insns, ...})::rest) =            | scan((blknum, CFG.BLOCK{insns, ...})::rest) =
# Line 121  Line 119 
119                   insns := elim(!insns, [])                   insns := elim(!insns, [])
120                  ) else ();                  ) else ();
121               scan rest)               scan rest)
122         and elim([], code) = rev code         and elim([], code) = List.rev code
123           | elim(i::instrs, code) =           | elim(i::instrs, code) =
124            if isDeadInstr i then            if isDeadInstr i then
125               ((* deadcode := !deadcode + 1; *) elim(instrs, code))               ((* deadcode := !deadcode + 1; *) elim(instrs, code))
# Line 150  Line 148 
148                      structure Spill = Spill                      structure Spill = Spill
149                     )                     )
150                   )                   )
151                  (fun cellkind CB.GP = true | cellkind _ = false                  (fun cellkind CB.GP = true
152                       | cellkind CB.FP = true
153                       | cellkind _ = false
154                   val deadRegs = deadRegs                   val deadRegs = deadRegs
155                   val affectedBlocks = affectedBlocks                   val affectedBlocks = affectedBlocks
156                   val spillInit = spillInit                   val spillInit = spillInit
# Line 170  Line 170 
170      val reloadInstr = SpillInstr.reload CB.GP      val reloadInstr = SpillInstr.reload CB.GP
171    
172      val name = "AMD64RegAlloc"      val name = "AMD64RegAlloc"
173      val amd64CfgDebugFlg =      val amd64CfgDebugFlg = MLRiscControl.mkFlag ("amd64-cfg-debug", "amd64 CFG debug mode")
          MLRiscControl.mkFlag ("amd64-cfg-debug", "amd64 CFG debug mode")  
174    
175      val nGPRegs = length Int.avail + length Int.dedicated      val nGPRegs = List.length Int.avail + List.length Int.dedicated
176      val nFPRegs = length Float.avail + length Float.dedicated      val nFPRegs = List.length Float.avail + List.length Float.dedicated
177    
178      structure GPR = GetReg      structure GPR = GetReg
179          (val nRegs = nGPRegs          (val nRegs = nGPRegs
180           val available = map CB.registerId Int.avail           val available = List.map CB.registerId Int.avail
181           val first = CB.registerId (I.C.GPReg 0))           val first = CB.registerId (I.C.GPReg 0))
182      structure FPR = GetReg      structure FPR = GetReg
183          (val nRegs = nFPRegs          (val nRegs = nFPRegs
184           val available = map CB.registerId Float.avail           val available = List.map CB.registerId Float.avail
185           val first = CB.registerId (I.C.FPReg 0))           val first = CB.registerId (I.C.FPReg 0))
186    
187      local      local
# Line 192  Line 191 
191          | set (dedicated, r :: rs) = (          | set (dedicated, r :: rs) = (
192            Array.update (dedicated, r, true);            Array.update (dedicated, r, true);
193            set (dedicated, rs))            set (dedicated, rs))
194        val _ = set (dedicatedR, map CB.registerId Int.dedicated)        val _ = set (dedicatedR, List.map CB.registerId Int.dedicated)
195        val _ = set (dedicatedF, map CB.registerId Float.dedicated)        val _ = set (dedicatedF, List.map CB.registerId Float.dedicated)
196        fun isDedicated dedicated r =        fun isDedicated dedicated r =
197            r < Array.length dedicated andalso Array.sub (dedicated, r)            r < Array.length dedicated andalso Array.sub (dedicated, r)
198      in      in
# Line 319  Line 318 
318          reloadDst = reloadReg s,          reloadDst = reloadReg s,
319          renameSrc = renameR,          renameSrc = renameR,
320          copyInstr = copyInstrR,          copyInstr = copyInstrR,
321          K         = length Int.avail,          K         = List.length Int.avail,
322          getreg    = GPR.getreg,          getreg    = GPR.getreg,
323          cellkind  = CB.GP,          cellkind  = CB.GP,
324          dedicated = isDedicatedR,          dedicated = isDedicatedR,
# Line 329  Line 328 
328          } : RA.raClient          } : RA.raClient
329    
330      fun getFregLoc (s, an, RA.FRAME loc) = Float.spillLoc (s, an, loc)      fun getFregLoc (s, an, RA.FRAME loc) = Float.spillLoc (s, an, loc)
331        | getFregLoc (s, an, RA.MEM_REG r) = I.FDirect r        | getFregLoc (s, an, RA.MEM_REG r) = raise Fail "mem regs unsupported"
332    
333      fun spillF s {annotations=an, kill, reg, spillLoc, instr} = let      fun spillF s {annotations=an, kill, reg, spillLoc, instr} = let
334          (* preserve annotation on instruction *)          (* preserve annotation on instruction *)
# Line 414  Line 413 
413          reloadDst = reloadFreg s,          reloadDst = reloadFreg s,
414          renameSrc = renameF,          renameSrc = renameF,
415          copyInstr = copyInstrF,          copyInstr = copyInstrF,
416          K         = length Float.avail,          K         = List.length Float.avail,
417          getreg    = FPR.getreg,          getreg    = FPR.getreg,
418          cellkind  = CB.FP,          cellkind  = CB.FP,
419          dedicated = isDedicatedF,          dedicated = isDedicatedF,

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