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View of /branches/vis12/bugs/bug006.diderot

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Revision 2150 - (download) (annotate)
Sun Feb 17 18:25:53 2013 UTC (8 years, 4 months ago) by jhr
File size: 1002 byte(s)
  Update bug status by moving fixed bugs to bugs/resolved directory.  Added
  bug005.diderot -- error in handling redefinition of variables
  bug006.diderot -- don't catch programs without outputs
/****************
Compiling this program gives:
...
mid-il DFA: cpu = 0.000 seconds, gc = 0.000 seconds, 4 nodes, 3 visits, 1 iterations
low-il DFA: cpu = 0.000 seconds, gc = 0.000 seconds, 3 nodes, 2 visits, 1 iterations
low-il DFA: cpu = 0.000 seconds, gc = 0.000 seconds, 3 nodes, 2 visits, 1 iterations
low-il DFA: cpu = 0.000 seconds, gc = 0.000 seconds, 18 nodes, 17 visits, 1 iterations
low-il DFA: cpu = 0.000 seconds, gc = 0.000 seconds, 4 nodes, 3 visits, 1 iterations
uncaught exception Fail [Fail: no output specified for strand sqroot]
  raised at common/phase-timer.sml:76.50-76.52
  raised at common/phase-timer.sml:76.50-76.52
  raised at c-target/c-target.sml:151.37-151.83

This should be caught as an error during typechecking.
****************/

real eps = 1.0;
strand sqroot(real val) {
   real root = val;
   update {
      root = (root + val/root)/2;
      if (|root^2 - val|/val < eps)
         stabilize;
   }
}
// Strand initialization
initially { sqroot(i) | i in 1..1000 };

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