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| [smlnj] / sml / branches / primop-branch-3 / compiler / CodeGen / amd64 / amd64CG.sml |
Diff of /sml/branches/primop-branch-3/compiler/CodeGen/amd64/amd64CG.sml
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Patch
| revision 2930, Wed Jan 23 23:23:57 2008 UTC | revision 2931, Thu Jan 24 02:23:59 2008 UTC | |
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| # | Line 67 | Line 67 |
| 67 | fun base() = (* XXXX *) | fun base() = (* XXXX *) |
| 68 | if !ClusterAnnotation.useVfp then AMD64CpsRegs.vfp else I.C.rsp | if !ClusterAnnotation.useVfp then AMD64CpsRegs.vfp else I.C.rsp |
| 69 | ||
| 70 | val floats16ByteAligned = false | |
| 71 | ||
| 72 | structure MLTreeComp= | structure MLTreeComp= |
| 73 | AMD64Gen( | AMD64Gen( |
| # | Line 101 | Line 102 |
| 102 | ||
| 103 | fun signBit ty = raise Fail "todo" | fun signBit ty = raise Fail "todo" |
| 104 | fun negateSignBit ty = raise Fail "todo" | fun negateSignBit ty = raise Fail "todo" |
| 105 | val floats16ByteAligned = floats16ByteAligned | |
| 106 | ) | ) |
| 107 | ||
| 108 | structure Jumps = | structure Jumps = |
| # | Line 205 | Line 207 |
| 207 | I.Displace{base=base(), disp=AMD64StackSpills.getFregLoc loc, mem=spill} | I.Displace{base=base(), disp=AMD64StackSpills.getFregLoc loc, mem=spill} |
| 208 | ||
| 209 | end | end |
| 210 | ||
| 211 | val floats16ByteAligned = floats16ByteAligned | |
| 212 | ) (* AMD64RA *) | ) (* AMD64RA *) |
| 213 | ) (* AMD64CG *) | ) (* AMD64CG *) |
| 214 | end | end |
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