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[smlnj] Annotation of /sml/trunk/src/MLRISC/alpha32/alpha32RegAlloc.sml
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Annotation of /sml/trunk/src/MLRISC/alpha32/alpha32RegAlloc.sml

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1 : monnier 16 (* alpha32RegAlloc.sml --- alpha integer and floating register allocator
2 :     *
3 :     * COPYRIGHT (c) 1996 AT&T Bell Laboratories.
4 :     *
5 :     *)
6 :    
7 :     (* Integer and floating register allocators are a partial application
8 :     * of a curried functor.
9 :     *)
10 :    
11 :    
12 :    
13 : monnier 167 functor Alpha32RegAlloc(structure I : INSTRUCTIONS where C = Alpha32Cells
14 :     structure P : INSN_PROPERTIES where I = I
15 :     structure F : FLOWGRAPH where I = I
16 :     structure Asm : EMITTER_NEW
17 :     where I = I and P = F.P) :
18 : monnier 16 sig
19 :     functor IntRa (structure RaUser : RA_USER_PARAMS
20 : monnier 167 where I = I
21 :     where type B.name = F.B.name
22 : monnier 16 (* should be: where I = I -- bug 1205 *)) : sig
23 :     datatype mode = REGISTER_ALLOCATION | COPY_PROPAGATION
24 :     val ra : mode -> F.cluster -> F.cluster
25 :     end
26 :     functor FloatRa (structure RaUser : RA_USER_PARAMS
27 : monnier 167 where I = I
28 :     where type B.name = F.B.name
29 : monnier 16 (* should be: where I = I *)) : sig
30 :     datatype mode = REGISTER_ALLOCATION | COPY_PROPAGATION
31 :     val ra : mode -> F.cluster -> F.cluster
32 :     end
33 :     end =
34 :     struct
35 : monnier 106 structure C = I.C
36 : monnier 16 (* liveness analysis for general purpose registers *)
37 :     structure RegLiveness =
38 :     Liveness(structure Flowgraph=F
39 :     structure Instruction=I
40 : monnier 106 val defUse = P.defUse C.GP
41 : monnier 16 fun regSet c = #1 (c:Alpha32Cells.cellset)
42 :     fun cellset((_,f),r) = (r,f))
43 :    
44 :    
45 :     (* integer register allocator *)
46 :     functor IntRa =
47 :     RegAllocator
48 :     (structure RaArch = struct
49 :    
50 :     structure InsnProps = P
51 :     structure AsmEmitter = Asm
52 :     structure I = I
53 :     structure Liveness=RegLiveness
54 : monnier 106 val defUse = P.defUse C.GP
55 : monnier 16 val firstPseudoR = 32
56 : monnier 106 val maxPseudoR = Alpha32Cells.maxCell
57 :     val numRegs = Alpha32Cells.numCell Alpha32Cells.GP
58 : monnier 16 fun regSet c = #1 (c:Alpha32Cells.cellset)
59 :     end)
60 :    
61 :    
62 :    
63 :     (* liveness analysis for floating point registers *)
64 :     structure FregLiveness =
65 :     Liveness(structure Flowgraph=F
66 :     structure Instruction=I
67 : monnier 106 val defUse = P.defUse C.FP
68 : monnier 16 fun regSet c = #2 (c:Alpha32Cells.cellset)
69 :     fun cellset((r,_),f) = (r,f))
70 :    
71 :     (* floating register allocator *)
72 :     functor FloatRa =
73 :     RegAllocator
74 :     (structure RaArch = struct
75 :    
76 :     structure InsnProps = P
77 :     structure AsmEmitter = Asm
78 :     structure Liveness=FregLiveness
79 :     structure I = I
80 :    
81 : monnier 106 val defUse = P.defUse C.FP
82 : monnier 16 val firstPseudoR = 32
83 : monnier 106 val maxPseudoR = Alpha32Cells.maxCell
84 :     val numRegs = Alpha32Cells.numCell Alpha32Cells.FP
85 : monnier 16 fun regSet c = #2 (c:Alpha32Cells.cellset)
86 :     end)
87 :     end
88 :    
89 :    
90 :    
91 :    
92 : monnier 139 (*
93 :     * $Log: alpha32RegAlloc.sml,v $
94 : monnier 167 * Revision 1.5 1998/09/30 19:34:39 dbm
95 :     * fixing sharing/defspec conflict
96 :     *
97 :     * Revision 1.4 1998/07/25 03:08:13 george
98 :     * added to support block names in MLRISC
99 :     *
100 : monnier 139 * Revision 1.3 1998/05/25 15:10:49 george
101 :     * Fixed RCS keywords
102 :     *
103 :     *)

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