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[smlnj] View of /sml/trunk/src/MLRISC/ppc/instructions/ppcShuffle.sml
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View of /sml/trunk/src/MLRISC/ppc/instructions/ppcShuffle.sml

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Revision 1033 - (download) (annotate)
Thu Jan 24 05:45:18 2002 UTC (19 years, 7 months ago) by george
File size: 1236 byte(s)
   There is a dramatic simplification in the interface to the
   register allocator for RISC architectures as a result of making
   parallel copy instructions explicit.
functor PPCShuffle(I:PPCINSTR) = struct
  structure I = I
  structure Shuffle = Shuffle(I)

  type t = {tmp:I.ea option, dst:CellsBasis.cell list, src:CellsBasis.cell list}

  fun error msg = MLRiscErrorMsg.error("PPCShuffle",msg)

  (* WARNING: these move operators assume 32 bit addressing is used! 
   * Allen
  fun move{src=I.Direct rs, dst=I.Direct rd} = 
        [I.arith{oper=I.OR, rt=rd, ra=rs, rb=rs, Rc=false, OE=false}]
    | move{src=I.Direct rs, dst=I.Displace{base, disp, mem}} = 
	[I.st{st=I.STW, rs=rs, ra=base, d=I.LabelOp disp, mem=mem}]
    | move{src=I.Displace{base, disp, mem}, dst=I.Direct rt} = 
	[I.l{ld=I.LWZ, rt=rt, ra=base, d=I.LabelOp disp, mem=mem}]
    | move _ = error "move"

  fun fmove{src=I.FDirect fs, dst=I.FDirect fd} = 
        [I.funary{oper=I.FMR, fb=fs, ft=fd, Rc=false}]
    | fmove{src=I.FDirect fs, dst=I.Displace{base, disp, mem}} = 
	[I.stf{st=I.STFD, fs=fs, ra=base, d=I.LabelOp disp, mem=mem}]
    | fmove{src=I.Displace{base, disp, mem}, dst=I.FDirect ft} =
	[I.lf{ld=I.LFD, ft=ft, ra=base, d=I.LabelOp disp, mem=mem}]
    | fmove _ = error "fmove"

  val shuffle = Shuffle.shuffle {mvInstr=move, ea=I.Direct}

  val shufflefp = Shuffle.shuffle {mvInstr=fmove, ea=I.FDirect}

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