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[smlnj] Annotation of /sml/trunk/src/MLRISC/sparc/mltree/sparc.sml
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Annotation of /sml/trunk/src/MLRISC/sparc/mltree/sparc.sml

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1 : monnier 245 (*
2 : monnier 411 * This is a new instruction selection module for Sparc,
3 :     * using the new instruction representation and the new MLTREE representation.
4 :     * Support for V9 has been added.
5 : monnier 245 *
6 : monnier 411 * The cc bit in arithmetic op are now embedded within the arithmetic
7 :     * opcode. This should save some space.
8 : monnier 245 *
9 : monnier 411 * -- Allen
10 : monnier 245 *)
11 :    
12 :     functor Sparc
13 :     (structure SparcInstr : SPARCINSTR
14 : monnier 411 structure PseudoInstrs : SPARC_PSEUDO_INSTR
15 : george 933 where I = SparcInstr
16 : george 555 structure ExtensionComp : MLTREE_EXTENSION_COMP
17 : george 933 where I = SparcInstr
18 :     and T = SparcInstr.T
19 :    
20 :    
21 : monnier 411 (*
22 :     * The client should also specify these parameters.
23 :     * These are the estimated cost of these instructions.
24 :     * The code generator will use alternative sequences that are
25 :     * cheaper when their costs are lower.
26 :     *)
27 : george 545 val muluCost : int ref (* cost of unsigned multiplication in cycles *)
28 : monnier 411 val divuCost : int ref (* cost of unsigned division in cycles *)
29 :     val multCost : int ref (* cost of trapping/signed multiplication in cycles *)
30 :     val divtCost : int ref (* cost of trapping/signed division in cycles *)
31 :    
32 :     (*
33 :     * If you don't want to use register windows at all, set this to false.
34 :     *)
35 :     val registerwindow : bool ref (* should we use register windows? *)
36 :    
37 :     val V9 : bool (* should we use V9 instruction set? *)
38 :     val useBR : bool ref
39 :     (* should we use the BR instruction (when in V9)?
40 :     * I think it is a good idea to use it.
41 :     *)
42 : monnier 245 ) : MLTREECOMP =
43 :     struct
44 : leunga 775 structure I = SparcInstr
45 :     structure T = I.T
46 : george 984 structure TS = ExtensionComp.TS
47 : leunga 775 structure R = T.Region
48 : monnier 411 structure C = I.C
49 : george 889 structure CB = CellsBasis
50 : monnier 245 structure W = Word32
51 :     structure P = PseudoInstrs
52 : george 545 structure A = MLRiscAnnotations
53 : george 909 structure CFG = ExtensionComp.CFG
54 : monnier 245
55 : george 984 type instrStream = (I.instruction, C.cellset, CFG.cfg) TS.stream
56 :     type mltreeStream = (T.stm, T.mlrisc list, CFG.cfg) TS.stream
57 : george 545
58 : george 761 val int_0 = T.I.int_0
59 :     fun toInt n = T.I.toInt(32, n)
60 :     fun LI i = T.LI(T.I.fromInt(32, i))
61 :     fun LT (n,m) = T.I.LT(32, n, m)
62 :     fun LE (n,m) = T.I.LE(32, n, m)
63 :    
64 : leunga 624 val intTy = if V9 then 64 else 32
65 : monnier 411 structure Gen = MLTreeGen(structure T = T
66 : leunga 624 val intTy = intTy
67 : monnier 411 val naturalWidths = if V9 then [32,64] else [32]
68 : monnier 429 datatype rep = SE | ZE | NEITHER
69 :     val rep = NEITHER
70 : monnier 411 )
71 : monnier 245
72 : monnier 411 functor Multiply32 = MLTreeMult
73 :     (structure I = I
74 :     structure T = T
75 : george 889 structure CB = CellsBasis
76 :     type arg = {r1:CB.cell,r2:CB.cell,d:CB.cell}
77 :     type argi = {r:CB.cell,i:int,d:CB.cell}
78 : monnier 411
79 :     val intTy = 32
80 :     fun mov{r,d} = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
81 :     fun add{r1,r2,d} = I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}
82 :     fun slli{r,i,d} = [I.SHIFT{s=I.SLL,r=r,i=I.IMMED i,d=d}]
83 :     fun srli{r,i,d} = [I.SHIFT{s=I.SRL,r=r,i=I.IMMED i,d=d}]
84 :     fun srai{r,i,d} = [I.SHIFT{s=I.SRA,r=r,i=I.IMMED i,d=d}]
85 :     )
86 : monnier 245
87 : monnier 411 functor Multiply64 = MLTreeMult
88 :     (structure I = I
89 :     structure T = T
90 : george 889 structure CB = CellsBasis
91 :     type arg = {r1:CB.cell,r2:CB.cell,d:CB.cell}
92 :     type argi = {r:CB.cell,i:int,d:CB.cell}
93 : monnier 411
94 :     val intTy = 64
95 :     fun mov{r,d} = I.COPY{dst=[d],src=[r],tmp=NONE,impl=ref NONE}
96 :     fun add{r1,r2,d} = I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}
97 :     fun slli{r,i,d} = [I.SHIFT{s=I.SLLX,r=r,i=I.IMMED i,d=d}]
98 :     fun srli{r,i,d} = [I.SHIFT{s=I.SRLX,r=r,i=I.IMMED i,d=d}]
99 :     fun srai{r,i,d} = [I.SHIFT{s=I.SRAX,r=r,i=I.IMMED i,d=d}]
100 :     )
101 : monnier 245
102 : monnier 411 (* signed, trapping version of multiply and divide *)
103 :     structure Mult32 = Multiply32
104 :     (val trapping = true
105 :     val multCost = multCost
106 :     fun addv{r1,r2,d} =
107 :     I.ARITH{a=I.ADDCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap32
108 :     fun subv{r1,r2,d} =
109 :     I.ARITH{a=I.SUBCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap32
110 :     val sh1addv = NONE
111 :     val sh2addv = NONE
112 :     val sh3addv = NONE
113 :     )
114 : monnier 429 (val signed = true)
115 : monnier 245
116 : monnier 411 (* unsigned, non-trapping version of multiply and divide *)
117 : leunga 657 functor Mul32 = Multiply32
118 : monnier 411 (val trapping = false
119 :     val multCost = muluCost
120 :     fun addv{r1,r2,d} = [I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}]
121 :     fun subv{r1,r2,d} = [I.ARITH{a=I.SUB,r=r1,i=I.REG r2,d=d}]
122 :     val sh1addv = NONE
123 :     val sh2addv = NONE
124 :     val sh3addv = NONE
125 :     )
126 : leunga 657 structure Mulu32 = Mul32(val signed = false)
127 : monnier 245
128 : leunga 657 structure Muls32 = Mul32(val signed = true)
129 :    
130 : monnier 411 (* signed, trapping version of multiply and divide *)
131 :     structure Mult64 = Multiply64
132 :     (val trapping = true
133 :     val multCost = multCost
134 :     fun addv{r1,r2,d} =
135 :     I.ARITH{a=I.ADDCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap64
136 :     fun subv{r1,r2,d} =
137 :     I.ARITH{a=I.SUBCC,r=r1,i=I.REG r2,d=d}::PseudoInstrs.overflowtrap64
138 :     val sh1addv = NONE
139 :     val sh2addv = NONE
140 :     val sh3addv = NONE
141 :     )
142 : monnier 429 (val signed = true)
143 : monnier 245
144 : monnier 411 (* unsigned, non-trapping version of multiply and divide *)
145 : leunga 657 functor Mul64 = Multiply64
146 : monnier 411 (val trapping = false
147 :     val multCost = muluCost
148 :     fun addv{r1,r2,d} = [I.ARITH{a=I.ADD,r=r1,i=I.REG r2,d=d}]
149 :     fun subv{r1,r2,d} = [I.ARITH{a=I.SUB,r=r1,i=I.REG r2,d=d}]
150 :     val sh1addv = NONE
151 :     val sh2addv = NONE
152 :     val sh3addv = NONE
153 :     )
154 : leunga 657 structure Mulu64 = Mul64(val signed = false)
155 : monnier 245
156 : leunga 657 structure Muls64 = Mul64(val signed = true)
157 :    
158 : monnier 411 datatype commutative = COMMUTE | NOCOMMUTE
159 :     datatype cc = REG (* write to register *)
160 :     | CC (* set condition code *)
161 :     | CC_REG (* do both *)
162 : monnier 245
163 : monnier 411 fun error msg = MLRiscErrorMsg.error("Sparc",msg)
164 : monnier 245
165 : leunga 744
166 :    
167 : monnier 411 fun selectInstructions
168 : george 545 (instrStream as
169 : george 984 TS.S.STREAM{emit,defineLabel,entryLabel,pseudoOp,annotation,getAnnotations,
170 : leunga 744 beginCluster,endCluster,exitBlock,comment,...}) =
171 : monnier 411 let
172 :     (* Flags *)
173 :     val useBR = !useBR
174 :     val registerwindow = !registerwindow
175 : monnier 245
176 : leunga 744 val trap32 = PseudoInstrs.overflowtrap32
177 :     val trap64 = PseudoInstrs.overflowtrap64
178 :     val zeroR = C.r0
179 :     val newReg = C.newReg
180 : monnier 411 val newFreg = C.newFreg
181 : george 761 val int_m4096 = T.I.fromInt(32, ~4096)
182 :     val int_4096 = T.I.fromInt(32, 4096)
183 :     fun immed13 n = LE(int_m4096, n) andalso LT(n, int_4096)
184 : monnier 411 fun immed13w w = let val x = W.~>>(w,0w12)
185 :     in x = 0w0 orelse (W.notb x) = 0w0 end
186 :     fun splitw w = {hi=W.toInt(W.>>(w,0w10)),lo=W.toInt(W.andb(w,0wx3ff))}
187 : george 761 fun split n = splitw(T.I.toWord32(32, n))
188 : monnier 245
189 : monnier 411
190 : leunga 744 val zeroOpn = I.REG zeroR (* zero value operand *)
191 : monnier 245
192 : monnier 411 fun cond T.LT = I.BL
193 :     | cond T.LTU = I.BCS
194 :     | cond T.LE = I.BLE
195 :     | cond T.LEU = I.BLEU
196 :     | cond T.EQ = I.BE
197 :     | cond T.NE = I.BNE
198 :     | cond T.GE = I.BGE
199 :     | cond T.GEU = I.BCC
200 :     | cond T.GT = I.BG
201 :     | cond T.GTU = I.BGU
202 : leunga 744 | cond _ = error "cond"
203 : monnier 245
204 : monnier 411 fun rcond T.LT = I.RLZ
205 :     | rcond T.LE = I.RLEZ
206 :     | rcond T.EQ = I.RZ
207 :     | rcond T.NE = I.RNZ
208 :     | rcond T.GE = I.RGEZ
209 :     | rcond T.GT = I.RGZ
210 :     | rcond _ = error "rcond"
211 : monnier 245
212 : monnier 411 fun signedCmp(T.LT | T.LE | T.EQ | T.NE | T.GE | T.GT) = true
213 :     | signedCmp _ = false
214 : monnier 245
215 : monnier 411 fun fcond T.== = I.FBE
216 :     | fcond T.?<> = I.FBNE
217 :     | fcond T.? = I.FBU
218 :     | fcond T.<=> = I.FBO
219 :     | fcond T.> = I.FBG
220 :     | fcond T.>= = I.FBGE
221 :     | fcond T.?> = I.FBUG
222 :     | fcond T.?>= = I.FBUGE
223 :     | fcond T.< = I.FBL
224 :     | fcond T.<= = I.FBLE
225 :     | fcond T.?< = I.FBUL
226 :     | fcond T.?<= = I.FBULE
227 :     | fcond T.<> = I.FBLG
228 :     | fcond T.?= = I.FBUE
229 : george 545 | fcond fc = error("fcond "^T.Basis.fcondToString fc)
230 : monnier 245
231 : monnier 411 fun mark'(i,[]) = i
232 :     | mark'(i,a::an) = mark'(I.ANNOTATION{i=i,a=a},an)
233 : monnier 245
234 : monnier 411 fun mark(i,an) = emit(mark'(i,an))
235 : monnier 245
236 : monnier 411 (* convert an operand into a register *)
237 :     fun reduceOpn(I.REG r) = r
238 : leunga 744 | reduceOpn(I.IMMED 0) = zeroR
239 : monnier 411 | reduceOpn i =
240 :     let val d = newReg()
241 : leunga 744 in emit(I.ARITH{a=I.OR,r=zeroR,i=i,d=d}); d end
242 : monnier 245
243 : monnier 411 (* emit parallel copies *)
244 :     fun copy(dst,src,an) =
245 :     mark(I.COPY{dst=dst,src=src,impl=ref NONE,
246 :     tmp=case dst of [_] => NONE
247 :     | _ => SOME(I.Direct(newReg()))},an)
248 :     fun fcopy(dst,src,an) =
249 :     mark(I.FCOPY{dst=dst,src=src,impl=ref NONE,
250 :     tmp=case dst of [_] => NONE
251 :     | _ => SOME(I.FDirect(newFreg()))},an)
252 : monnier 245
253 : monnier 411 (* move register s to register d *)
254 :     fun move(s,d,an) =
255 : george 889 if CB.sameColor(s,d) orelse CB.registerId d = 0 then ()
256 : monnier 411 else mark(I.COPY{dst=[d],src=[s],tmp=NONE,impl=ref NONE},an)
257 :    
258 :     (* move floating point register s to register d *)
259 :     fun fmoved(s,d,an) =
260 : george 889 if CB.sameColor(s,d) then ()
261 : monnier 411 else mark(I.FCOPY{dst=[d],src=[s],tmp=NONE,impl=ref NONE},an)
262 : monnier 475 fun fmoves(s,d,an) = fmoved(s,d,an) (* error "fmoves" for now!!! XXX *)
263 : monnier 411 fun fmoveq(s,d,an) = error "fmoveq"
264 :    
265 :     (* load immediate *)
266 :     and loadImmed(n,d,cc,an) =
267 :     let val or = if cc <> REG then I.ORCC else I.OR
268 : george 761 in if immed13 n then mark(I.ARITH{a=or,r=zeroR,i=I.IMMED(toInt n),d=d},an)
269 : monnier 411 else let val {hi,lo} = split n
270 :     in if lo = 0 then
271 :     (mark(I.SETHI{i=hi,d=d},an); genCmp0(cc,d))
272 :     else let val t = newReg()
273 :     in emit(I.SETHI{i=hi,d=t});
274 :     mark(I.ARITH{a=or,r=t,i=I.IMMED lo,d=d},an)
275 :     end
276 :     end
277 :     end
278 : monnier 245
279 : monnier 411 (* load label expression *)
280 :     and loadLabel(lab,d,cc,an) =
281 :     let val or = if cc <> REG then I.ORCC else I.OR
282 : leunga 744 in mark(I.ARITH{a=or,r=zeroR,i=I.LAB lab,d=d},an) end
283 : monnier 245
284 : monnier 411 (* emit an arithmetic op *)
285 :     and arith(a,acc,e1,e2,d,cc,comm,trap,an) =
286 :     let val (a,d) = case cc of
287 :     REG => (a,d)
288 : leunga 744 | CC => (acc,zeroR)
289 : monnier 411 | CC_REG => (acc,d)
290 :     in case (opn e1,opn e2,comm) of
291 :     (i,I.REG r,COMMUTE)=> mark(I.ARITH{a=a,r=r,i=i,d=d},an)
292 :     | (I.REG r,i,_) => mark(I.ARITH{a=a,r=r,i=i,d=d},an)
293 :     | (r,i,_) => mark(I.ARITH{a=a,r=reduceOpn r,i=i,d=d},an)
294 :     ;
295 :     case trap of [] => () | _ => app emit trap
296 :     end
297 : monnier 245
298 : monnier 411 (* emit a shift op *)
299 :     and shift(s,e1,e2,d,cc,an) =
300 :     (mark(I.SHIFT{s=s,r=expr e1,i=opn e2,d=d},an);
301 :     genCmp0(cc,d)
302 :     )
303 : monnier 245
304 : monnier 411 (* emit externally defined multiply or division operation (V8) *)
305 :     and extarith(gen,genConst,e1,e2,d,cc,comm) =
306 :     let fun nonconst(e1,e2) =
307 :     case (opn e1,opn e2,comm) of
308 :     (i,I.REG r,COMMUTE) => gen({r=r,i=i,d=d},reduceOpn)
309 :     | (I.REG r,i,_) => gen({r=r,i=i,d=d},reduceOpn)
310 :     | (r,i,_) => gen({r=reduceOpn r,i=i,d=d},reduceOpn)
311 :     fun const(e,i) =
312 :     let val r = expr e
313 : george 761 in genConst{r=r,i=toInt i,d=d}
314 : monnier 411 handle _ => gen({r=r,i=opn(T.LI i),d=d},reduceOpn)
315 :     end
316 :     val instrs =
317 :     case (comm,e1,e2) of
318 :     (_,e1,T.LI i) => const(e1,i)
319 :     | (COMMUTE,T.LI i,e2) => const(e2,i)
320 :     | _ => nonconst(e1,e2)
321 :     in app emit instrs;
322 :     genCmp0(cc,d)
323 :     end
324 : monnier 245
325 : monnier 411 (* emit 64-bit multiply or division operation (V9) *)
326 :     and muldiv64(a,genConst,e1,e2,d,cc,comm,an) =
327 :     let fun nonconst(e1,e2) =
328 :     [mark'(
329 :     case (opn e1,opn e2,comm) of
330 :     (i,I.REG r,COMMUTE) => I.ARITH{a=a,r=r,i=i,d=d}
331 :     | (I.REG r,i,_) => I.ARITH{a=a,r=r,i=i,d=d}
332 :     | (r,i,_) => I.ARITH{a=a,r=reduceOpn r,i=i,d=d},an)
333 :     ]
334 :     fun const(e,i) =
335 :     let val r = expr e
336 : george 761 in genConst{r=r,i=toInt i,d=d}
337 : monnier 411 handle _ => [mark'(I.ARITH{a=a,r=r,i=opn(T.LI i),d=d},an)]
338 :     end
339 :     val instrs =
340 :     case (comm,e1,e2) of
341 :     (_,e1,T.LI i) => const(e1,i)
342 :     | (COMMUTE,T.LI i,e2) => const(e2,i)
343 :     | _ => nonconst(e1,e2)
344 :     in app emit instrs;
345 :     genCmp0(cc,d)
346 :     end
347 :    
348 :     (* divisions *)
349 : george 545 and divu32 x = Mulu32.divide{mode=T.TO_ZERO,stm=doStmt} x
350 : leunga 657 and divs32 x = Muls32.divide{mode=T.TO_ZERO,stm=doStmt} x
351 : george 545 and divt32 x = Mult32.divide{mode=T.TO_ZERO,stm=doStmt} x
352 :     and divu64 x = Mulu64.divide{mode=T.TO_ZERO,stm=doStmt} x
353 : leunga 657 and divs64 x = Muls64.divide{mode=T.TO_ZERO,stm=doStmt} x
354 : george 545 and divt64 x = Mult64.divide{mode=T.TO_ZERO,stm=doStmt} x
355 : monnier 411
356 :     (* emit an unary floating point op *)
357 :     and funary(a,e,d,an) = mark(I.FPop1{a=a,r=fexpr e,d=d},an)
358 :    
359 :     (* emit a binary floating point op *)
360 :     and farith(a,e1,e2,d,an) =
361 :     mark(I.FPop2{a=a,r1=fexpr e1,r2=fexpr e2,d=d},an)
362 :    
363 :     (* convert an expression into an addressing mode *)
364 : blume 841 and addr(T.ADD(ty, (T.ADD (_, e, T.LI n)|
365 :     T.ADD (_, T.LI n, e)), T.LI n')) =
366 :     addr(T.ADD (ty, e, T.LI (T.I.ADD (ty, n, n'))))
367 :     | addr(T.ADD(ty, T.SUB (_, e, T.LI n), T.LI n')) =
368 :     addr(T.ADD (ty, e, T.LI (T.I.SUB (ty, n', n))))
369 :     | addr(T.ADD(_,e,T.LI n)) =
370 : george 761 if immed13 n then (expr e,I.IMMED(toInt n))
371 : monnier 411 else let val d = newReg()
372 :     in loadImmed(n,d,REG,[]); (d,opn e) end
373 : leunga 775 | addr(T.ADD(_,e,x as T.CONST c)) = (expr e,I.LAB x)
374 :     | addr(T.ADD(_,e,x as T.LABEL l)) = (expr e,I.LAB x)
375 :     | addr(T.ADD(_,e,T.LABEXP x)) = (expr e,I.LAB x)
376 : monnier 411 | addr(T.ADD(ty,i as T.LI _,e)) = addr(T.ADD(ty,e,i))
377 : leunga 775 | addr(T.ADD(_,x as T.CONST c,e)) = (expr e,I.LAB x)
378 :     | addr(T.ADD(_,x as T.LABEL l,e)) = (expr e,I.LAB x)
379 :     | addr(T.ADD(_,T.LABEXP x,e)) = (expr e,I.LAB x)
380 : monnier 411 | addr(T.ADD(_,e1,e2)) = (expr e1,I.REG(expr e2))
381 : george 761 | addr(T.SUB(ty,e,T.LI n)) = addr(T.ADD(ty,e,T.LI(T.I.NEG(32,n))))
382 : leunga 775 | addr(x as T.LABEL l) = (zeroR,I.LAB x)
383 :     | addr(T.LABEXP x) = (zeroR,I.LAB x)
384 : monnier 411 | addr a = (expr a,zeroOpn)
385 :    
386 :     (* emit an integer load *)
387 :     and load(l,a,d,mem,cc,an) =
388 :     let val (r,i) = addr a
389 :     in mark(I.LOAD{l=l,r=r,i=i,d=d,mem=mem},an);
390 :     genCmp0(cc,d)
391 :     end
392 :    
393 :     (* emit an integer store *)
394 :     and store(s,a,d,mem,an) =
395 :     let val (r,i) = addr a
396 :     in mark(I.STORE{s=s,r=r,i=i,d=expr d,mem=mem},an) end
397 :    
398 :     (* emit a floating point load *)
399 :     and fload(l,a,d,mem,an) =
400 :     let val (r,i) = addr a
401 :     in mark(I.FLOAD{l=l,r=r,i=i,d=d,mem=mem},an) end
402 :    
403 :     (* emit a floating point store *)
404 :     and fstore(s,a,d,mem,an) =
405 :     let val (r,i) = addr a
406 :     in mark(I.FSTORE{s=s,r=r,i=i,d=fexpr d,mem=mem},an) end
407 :    
408 :     (* emit a jump *)
409 :     and jmp(a,labs,an) =
410 :     let val (r,i) = addr a
411 :     in mark(I.JMP{r=r,i=i,labs=labs,nop=true},an) end
412 :    
413 : george 545 (* convert mlrisc to cellset *)
414 :     and cellset mlrisc =
415 :     let fun g([],set) = set
416 : george 901 | g(T.GPR(T.REG(_,r))::regs,set) = g(regs,CB.CellSet.add(r,set))
417 :     | g(T.FPR(T.FREG(_,f))::regs,set) = g(regs,CB.CellSet.add(f,set))
418 :     | g(T.CCR(T.CC(_,cc))::regs,set) = g(regs,CB.CellSet.add(cc,set))
419 : george 545 | g(_::regs, set) = g(regs,set)
420 :     in g(mlrisc, C.empty) end
421 :    
422 : monnier 411 (* emit a function call *)
423 : blume 839 and call(a,flow,defs,uses,mem,cutsTo,an,0) =
424 :     let val (r,i) = addr a
425 :     val defs=cellset(defs)
426 :     val uses=cellset(uses)
427 : george 889 in case (CB.registerId r,i) of
428 : blume 839 (0,I.LAB(T.LABEL l)) =>
429 :     mark(I.CALL{label=l,defs=C.addReg(C.linkReg,defs),uses=uses,
430 :     cutsTo=cutsTo,mem=mem,nop=true},an)
431 :     | _ => mark(I.JMPL{r=r,i=i,d=C.linkReg,defs=defs,uses=uses,
432 :     cutsTo=cutsTo,mem=mem,nop=true},an)
433 :     end
434 :     | call _ = error "pops<>0 not implemented"
435 : monnier 245
436 : monnier 411 (* emit an integer branch instruction *)
437 : leunga 744 and branch(T.CMP(ty,cond,a,b),lab,an) =
438 : monnier 411 let val (cond,a,b) =
439 :     case a of
440 : george 761 (T.LI _ | T.CONST _ | T.LABEL _) =>
441 : george 545 (T.Basis.swapCond cond,b,a)
442 : monnier 411 | _ => (cond,a,b)
443 :     in if V9 then
444 :     branchV9(cond,a,b,lab,an)
445 :     else
446 :     (doExpr(T.SUB(ty,a,b),newReg(),CC,[]); br(cond,lab,an))
447 :     end
448 : leunga 744 | branch(T.CC(cond,r),lab,an) =
449 : george 889 if CB.sameCell(r, C.psr) then br(cond,lab,an)
450 : leunga 744 else (genCmp0(CC,r); br(cond,lab,an))
451 :     | branch(T.FCMP(fty,cond,a,b),lab,an) =
452 : george 545 let val cmp = case fty of
453 :     32 => I.FCMPs
454 :     | 64 => I.FCMPd
455 :     | _ => error "fbranch"
456 :     in emit(I.FCMP{cmp=cmp,r1=fexpr a,r2=fexpr b,nop=true});
457 :     mark(I.FBfcc{b=fcond cond,a=false,label=lab,nop=true},an)
458 :     end
459 : monnier 411 | branch _ = error "branch"
460 : monnier 245
461 : monnier 411 and branchV9(cond,a,b,lab,an) =
462 : leunga 624 let val size = Gen.Size.size a
463 : monnier 411 in if useBR andalso signedCmp cond then
464 :     let val r = newReg()
465 :     in doExpr(T.SUB(size,a,b),r,REG,[]);
466 :     brcond(cond,r,lab,an)
467 :     end
468 :     else
469 :     let val cc = case size of 32 => I.ICC
470 :     | 64 => I.XCC
471 :     | _ => error "branchV9"
472 :     in doExpr(T.SUB(size,a,b),newReg(),CC,[]);
473 :     bp(cond,cc,lab,an)
474 :     end
475 :     end
476 : monnier 245
477 : monnier 411 and br(c,lab,an) = mark(I.Bicc{b=cond c,a=true,label=lab,nop=true},an)
478 : monnier 245
479 : monnier 411 and brcond(c,r,lab,an) =
480 :     mark(I.BR{rcond=rcond c,r=r,p=I.PT,a=true,label=lab,nop=true},an)
481 : monnier 245
482 : monnier 411 and bp(c,cc,lab,an) =
483 :     mark(I.BP{b=cond c,cc=cc,p=I.PT,a=true,label=lab,nop=true},an)
484 : monnier 245
485 : monnier 411 (* generate code for a statement *)
486 :     and stmt(T.MV(_,d,e),an) = doExpr(e,d,REG,an)
487 :     | stmt(T.FMV(_,d,e),an) = doFexpr(e,d,an)
488 :     | stmt(T.CCMV(d,e),an) = doCCexpr(e,d,an)
489 :     | stmt(T.COPY(_,dst,src),an) = copy(dst,src,an)
490 : monnier 475 | stmt(T.FCOPY(_,dst,src),an) = fcopy(dst,src,an)
491 : leunga 775 | stmt(T.JMP(T.LABEL l,_),an) =
492 : monnier 411 mark(I.Bicc{b=I.BA,a=true,label=l,nop=false},an)
493 : leunga 744 | stmt(T.JMP(e,labs),an) = jmp(e,labs,an)
494 : blume 839 | stmt(T.CALL{funct,targets,defs,uses,region,pops,...},an) =
495 :     call(funct,targets,defs,uses,region,[],an,pops)
496 : leunga 796 | stmt(T.FLOW_TO
497 : blume 839 (T.CALL{funct,targets,defs,uses,region,pops,...},cutsTo),an) =
498 :     call(funct,targets,defs,uses,region,cutsTo,an,pops)
499 : george 545 | stmt(T.RET _,an) = mark(I.RET{leaf=not registerwindow,nop=true},an)
500 : monnier 411 | stmt(T.STORE(8,a,d,mem),an) = store(I.STB,a,d,mem,an)
501 :     | stmt(T.STORE(16,a,d,mem),an) = store(I.STH,a,d,mem,an)
502 :     | stmt(T.STORE(32,a,d,mem),an) = store(I.ST,a,d,mem,an)
503 :     | stmt(T.STORE(64,a,d,mem),an) =
504 :     store(if V9 then I.STX else I.STD,a,d,mem,an)
505 :     | stmt(T.FSTORE(32,a,d,mem),an) = fstore(I.STF,a,d,mem,an)
506 :     | stmt(T.FSTORE(64,a,d,mem),an) = fstore(I.STDF,a,d,mem,an)
507 : leunga 744 | stmt(T.BCC(cc,lab),an) = branch(cc,lab,an)
508 : george 545 | stmt(T.DEFINE l,_) = defineLabel l
509 : monnier 411 | stmt(T.ANNOTATION(s,a),an) = stmt(s,a::an)
510 : george 555 | stmt(T.EXT s,an) = ExtensionComp.compileSext(reducer()) {stm=s, an=an}
511 : george 545 | stmt(s,an) = doStmts(Gen.compileStm s)
512 : monnier 245
513 : monnier 411 and doStmt s = stmt(s,[])
514 : monnier 245
515 : george 545 and doStmts ss = app doStmt ss
516 : monnier 245
517 : monnier 411 (* convert an expression into a register *)
518 : george 761 and expr e = let
519 :     fun comp() = let
520 :     val d = newReg()
521 :     in doExpr(e, d, REG, []); d
522 :     end
523 :     in case e
524 :     of T.REG(_,r) => r
525 :     | T.LI z => if T.I.isZero z then zeroR else comp()
526 :     | _ => comp()
527 :     end
528 : monnier 245
529 : monnier 411 (* compute an integer expression and put the result in register d
530 :     * If cc is set then set the condition code with the result.
531 :     *)
532 :     and doExpr(e,d,cc,an) =
533 :     case e of
534 :     T.REG(_,r) => (move(r,d,an); genCmp0(cc,r))
535 :     | T.LI n => loadImmed(n,d,cc,an)
536 : leunga 775 | T.LABEL l => loadLabel(e,d,cc,an)
537 :     | T.CONST c => loadLabel(e,d,cc,an)
538 :     | T.LABEXP x => loadLabel(x,d,cc,an)
539 : monnier 245
540 : monnier 411 (* generic 32/64 bit support *)
541 :     | T.ADD(_,a,b) => arith(I.ADD,I.ADDCC,a,b,d,cc,COMMUTE,[],an)
542 : george 761 | T.SUB(_,a,b) => let
543 :     fun default() = arith(I.SUB,I.SUBCC,a,b,d,cc,NOCOMMUTE,[],an)
544 :     in
545 :     case b
546 :     of T.LI z =>
547 :     if T.I.isZero(z) then doExpr(a,d,cc,an) else default()
548 :     | _ => default()
549 :     (*esac*)
550 :     end
551 :    
552 : monnier 411 | T.ANDB(_,a,T.NOTB(_,b)) =>
553 :     arith(I.ANDN,I.ANDNCC,a,b,d,cc,NOCOMMUTE,[],an)
554 :     | T.ORB(_,a,T.NOTB(_,b)) =>
555 :     arith(I.ORN,I.ORNCC,a,b,d,cc,NOCOMMUTE,[],an)
556 :     | T.XORB(_,a,T.NOTB(_,b)) =>
557 :     arith(I.XNOR,I.XNORCC,a,b,d,cc,COMMUTE,[],an)
558 :     | T.ANDB(_,T.NOTB(_,a),b) =>
559 :     arith(I.ANDN,I.ANDNCC,b,a,d,cc,NOCOMMUTE,[],an)
560 :     | T.ORB(_,T.NOTB(_,a),b) =>
561 :     arith(I.ORN,I.ORNCC,b,a,d,cc,NOCOMMUTE,[],an)
562 :     | T.XORB(_,T.NOTB(_,a),b) =>
563 :     arith(I.XNOR,I.XNORCC,b,a,d,cc,COMMUTE,[],an)
564 :     | T.NOTB(_,T.XORB(_,a,b)) =>
565 :     arith(I.XNOR,I.XNORCC,a,b,d,cc,COMMUTE,[],an)
566 : monnier 245
567 : monnier 411 | T.ANDB(_,a,b) => arith(I.AND,I.ANDCC,a,b,d,cc,COMMUTE,[],an)
568 :     | T.ORB(_,a,b) => arith(I.OR,I.ORCC,a,b,d,cc,COMMUTE,[],an)
569 :     | T.XORB(_,a,b) => arith(I.XOR,I.XORCC,a,b,d,cc,COMMUTE,[],an)
570 : george 761 | T.NOTB(_,a) => arith(I.XNOR,I.XNORCC,a,LI 0,d,cc,COMMUTE,[],an)
571 : monnier 245
572 : monnier 411 (* 32 bit support *)
573 :     | T.SRA(32,a,b) => shift(I.SRA,a,b,d,cc,an)
574 :     | T.SRL(32,a,b) => shift(I.SRL,a,b,d,cc,an)
575 :     | T.SLL(32,a,b) => shift(I.SLL,a,b,d,cc,an)
576 :     | T.ADDT(32,a,b)=>
577 :     arith(I.ADDCC,I.ADDCC,a,b,d,CC_REG,COMMUTE,trap32,an)
578 :     | T.SUBT(32,a,b)=>
579 :     arith(I.SUBCC,I.SUBCC,a,b,d,CC_REG,NOCOMMUTE,trap32,an)
580 : leunga 657 | T.MULU(32,a,b) => extarith(P.umul32,
581 :     Mulu32.multiply,a,b,d,cc,COMMUTE)
582 :     | T.MULS(32,a,b) => extarith(P.smul32,
583 :     Muls32.multiply,a,b,d,cc,COMMUTE)
584 :     | T.MULT(32,a,b) => extarith(P.smul32trap,
585 :     Mult32.multiply,a,b,d,cc,COMMUTE)
586 :     | T.DIVU(32,a,b) => extarith(P.udiv32,divu32,a,b,d,cc,NOCOMMUTE)
587 :     | T.DIVS(32,a,b) => extarith(P.sdiv32,divs32,a,b,d,cc,NOCOMMUTE)
588 :     | T.DIVT(32,a,b) => extarith(P.sdiv32trap,divt32,a,b,d,cc,NOCOMMUTE)
589 : monnier 245
590 : monnier 411 (* 64 bit support *)
591 :     | T.SRA(64,a,b) => shift(I.SRAX,a,b,d,cc,an)
592 :     | T.SRL(64,a,b) => shift(I.SRLX,a,b,d,cc,an)
593 :     | T.SLL(64,a,b) => shift(I.SLLX,a,b,d,cc,an)
594 :     | T.ADDT(64,a,b)=>
595 :     arith(I.ADDCC,I.ADDCC,a,b,d,CC_REG,COMMUTE,trap64,an)
596 :     | T.SUBT(64,a,b)=>
597 :     arith(I.SUBCC,I.SUBCC,a,b,d,CC_REG,NOCOMMUTE,trap64,an)
598 :     | T.MULU(64,a,b) =>
599 :     muldiv64(I.MULX,Mulu64.multiply,a,b,d,cc,COMMUTE,an)
600 : leunga 657 | T.MULS(64,a,b) =>
601 :     muldiv64(I.MULX,Muls64.multiply,a,b,d,cc,COMMUTE,an)
602 : monnier 411 | T.MULT(64,a,b) =>
603 :     (muldiv64(I.MULX,Mult64.multiply,a,b,d,CC_REG,COMMUTE,an);
604 :     app emit trap64)
605 :     | T.DIVU(64,a,b) => muldiv64(I.UDIVX,divu64,a,b,d,cc,NOCOMMUTE,an)
606 : leunga 657 | T.DIVS(64,a,b) => muldiv64(I.SDIVX,divs64,a,b,d,cc,NOCOMMUTE,an)
607 : monnier 411 | T.DIVT(64,a,b) => muldiv64(I.SDIVX,divt64,a,b,d,cc,NOCOMMUTE,an)
608 : monnier 245
609 : monnier 411 (* loads *)
610 :     | T.LOAD(8,a,mem) => load(I.LDUB,a,d,mem,cc,an)
611 : leunga 744 | T.SX(_,_,T.LOAD(8,a,mem)) => load(I.LDSB,a,d,mem,cc,an)
612 : monnier 411 | T.LOAD(16,a,mem) => load(I.LDUH,a,d,mem,cc,an)
613 : leunga 744 | T.SX(_,_,T.LOAD(16,a,mem)) => load(I.LDSH,a,d,mem,cc,an)
614 : monnier 411 | T.LOAD(32,a,mem) => load(I.LD,a,d,mem,cc,an)
615 : george 545 | T.LOAD(64,a,mem) =>
616 :     load(if V9 then I.LDX else I.LDD,a,d,mem,cc,an)
617 : monnier 245
618 : monnier 411 (* conditional expression *)
619 : george 545 | T.COND exp => doStmts (Gen.compileCond{exp=exp,rd=d,an=an})
620 : monnier 411
621 :     (* misc *)
622 : george 545 | T.LET(s,e) => (doStmt s; doExpr(e, d, cc, an))
623 :     | T.MARK(e,A.MARKREG f) => (f d; doExpr(e,d,cc,an))
624 :     | T.MARK(e,a) => doExpr(e,d,cc,a::an)
625 :     | T.PRED(e,c) => doExpr(e,d,cc,A.CTRLUSE c::an)
626 : george 555 | T.REXT e => ExtensionComp.compileRext (reducer()) {e=e, rd=d, an=an}
627 : george 545 | e => doExpr(Gen.compileRexp e,d,cc,an)
628 : monnier 411
629 :     (* generate a comparison with zero *)
630 :     and genCmp0(REG,_) = ()
631 : leunga 744 | genCmp0(_,d) = emit(I.ARITH{a=I.SUBCC,r=d,i=zeroOpn,d=zeroR})
632 : monnier 411
633 :     (* convert an expression into a floating point register *)
634 :     and fexpr(T.FREG(_,r)) = r
635 :     | fexpr e = let val d = newFreg() in doFexpr(e,d,[]); d end
636 :    
637 :     (* compute a floating point expression and put the result in d *)
638 :     and doFexpr(e,d,an) =
639 :     case e of
640 :     (* single precision *)
641 :     T.FREG(32,r) => fmoves(r,d,an)
642 :     | T.FLOAD(32,ea,mem) => fload(I.LDF,ea,d,mem,an)
643 :     | T.FADD(32,a,b) => farith(I.FADDs,a,b,d,an)
644 :     | T.FSUB(32,a,b) => farith(I.FSUBs,a,b,d,an)
645 :     | T.FMUL(32,a,b) => farith(I.FMULs,a,b,d,an)
646 :     | T.FDIV(32,a,b) => farith(I.FDIVs,a,b,d,an)
647 :     | T.FABS(32,a) => funary(I.FABSs,a,d,an)
648 :     | T.FNEG(32,a) => funary(I.FNEGs,a,d,an)
649 :     | T.FSQRT(32,a) => funary(I.FSQRTs,a,d,an)
650 :    
651 :     (* double precision *)
652 :     | T.FREG(64,r) => fmoved(r,d,an)
653 :     | T.FLOAD(64,ea,mem) => fload(I.LDDF,ea,d,mem,an)
654 :     | T.FADD(64,a,b) => farith(I.FADDd,a,b,d,an)
655 :     | T.FSUB(64,a,b) => farith(I.FSUBd,a,b,d,an)
656 :     | T.FMUL(64,a,b) => farith(I.FMULd,a,b,d,an)
657 :     | T.FDIV(64,a,b) => farith(I.FDIVd,a,b,d,an)
658 :     | T.FABS(64,a) => funary(I.FABSd,a,d,an)
659 :     | T.FNEG(64,a) => funary(I.FNEGd,a,d,an)
660 :     | T.FSQRT(64,a) => funary(I.FSQRTd,a,d,an)
661 :    
662 :     (* quad precision *)
663 :     | T.FREG(128,r) => fmoveq(r,d,an)
664 :     | T.FADD(128,a,b) => farith(I.FADDq,a,b,d,an)
665 :     | T.FSUB(128,a,b) => farith(I.FSUBq,a,b,d,an)
666 :     | T.FMUL(128,a,b) => farith(I.FMULq,a,b,d,an)
667 :     | T.FDIV(128,a,b) => farith(I.FDIVq,a,b,d,an)
668 :     | T.FABS(128,a) => funary(I.FABSq,a,d,an)
669 :     | T.FNEG(128,a) => funary(I.FNEGq,a,d,an)
670 :     | T.FSQRT(128,a) => funary(I.FSQRTq,a,d,an)
671 :    
672 :     (* floating point to floating point *)
673 : george 545 | T.CVTF2F(ty,ty',e) =>
674 : monnier 475 (case (ty,ty') of
675 :     (32,32) => doFexpr(e,d,an)
676 :     | (64,32) => funary(I.FsTOd,e,d,an)
677 : monnier 411 | (128,32) => funary(I.FsTOq,e,d,an)
678 : monnier 475 | (32,64) => funary(I.FdTOs,e,d,an)
679 :     | (64,64) => doFexpr(e,d,an)
680 : monnier 411 | (128,64) => funary(I.FdTOq,e,d,an)
681 :     | (32,128) => funary(I.FqTOs,e,d,an)
682 :     | (64,128) => funary(I.FqTOd,e,d,an)
683 :     | (128,128) => doFexpr(e,d,an)
684 :     | _ => error "CVTF2F"
685 :     )
686 :    
687 :     (* integer to floating point *)
688 : george 545 | T.CVTI2F(32,32,e) => app emit (P.cvti2s({i=opn e,d=d},reduceOpn))
689 :     | T.CVTI2F(64,32,e) => app emit (P.cvti2d({i=opn e,d=d},reduceOpn))
690 :     | T.CVTI2F(128,32,e) => app emit (P.cvti2q({i=opn e,d=d},reduceOpn))
691 : monnier 411
692 : george 545 | T.FMARK(e,A.MARKREG f) => (f d; doFexpr(e,d,an))
693 :     | T.FMARK(e,a) => doFexpr(e,d,a::an)
694 :     | T.FPRED(e,c) => doFexpr(e,d,A.CTRLUSE c::an)
695 : george 555 | T.FEXT e => ExtensionComp.compileFext (reducer()) {e=e, fd=d, an=an}
696 : george 545 | e => doFexpr(Gen.compileFexp e,d,an)
697 : monnier 411
698 : leunga 744 and doCCexpr(T.CMP(ty,cond,e1,e2),cc,an) =
699 : george 889 if CB.sameCell(cc,C.psr) then
700 : leunga 744 doExpr(T.SUB(ty,e1,e2),newReg(),CC,an)
701 :     else error "doCCexpr"
702 :     | doCCexpr(T.CC(_,r),d,an) =
703 : george 889 if CB.sameColor(r,C.psr) then error "doCCexpr"
704 : leunga 744 else move(r,d,an)
705 : george 545 | doCCexpr(T.CCMARK(e,A.MARKREG f),d,an) = (f d; doCCexpr(e,d,an))
706 :     | doCCexpr(T.CCMARK(e,a),d,an) = doCCexpr(e,d,a::an)
707 :     | doCCexpr(T.CCEXT e,d,an) =
708 : george 555 ExtensionComp.compileCCext (reducer()) {e=e, ccd=d, an=an}
709 : monnier 411 | doCCexpr e = error "doCCexpr"
710 :    
711 :     and ccExpr e = let val d = newReg() in doCCexpr(e,d,[]); d end
712 :    
713 :     (* convert an expression into an operand *)
714 : leunga 775 and opn(x as T.CONST c) = I.LAB x
715 :     | opn(x as T.LABEL l) = I.LAB x
716 :     | opn(T.LABEXP x) = I.LAB x
717 : george 761 | opn(e as T.LI n) =
718 :     if T.I.isZero(n) then zeroOpn
719 :     else if immed13 n then I.IMMED(toInt n)
720 :     else I.REG(expr e)
721 : monnier 411 | opn e = I.REG(expr e)
722 :    
723 : george 545 and reducer() =
724 : george 984 TS.REDUCER{reduceRexp = expr,
725 : george 545 reduceFexp = fexpr,
726 :     reduceCCexp = ccExpr,
727 :     reduceStm = stmt,
728 :     operand = opn,
729 :     reduceOperand = reduceOpn,
730 :     addressOf = addr,
731 :     emit = mark,
732 :     instrStream = instrStream,
733 :     mltreeStream = self()
734 :     }
735 :     and self() =
736 : george 984 TS.S.STREAM
737 : leunga 815 { beginCluster = beginCluster,
738 :     endCluster = endCluster,
739 :     emit = doStmt,
740 :     pseudoOp = pseudoOp,
741 :     defineLabel = defineLabel,
742 :     entryLabel = entryLabel,
743 :     comment = comment,
744 :     annotation = annotation,
745 :     getAnnotations = getAnnotations,
746 :     exitBlock = fn regs => exitBlock(cellset regs)
747 : george 545 }
748 :     in self()
749 : monnier 245 end
750 :    
751 :     end
752 :    
753 : monnier 411 (*
754 :     * Machine code generator for SPARC.
755 : monnier 245 *
756 : monnier 411 * The SPARC architecture has 32 general purpose registers (%g0 is always 0)
757 :     * and 32 single precision floating point registers.
758 : monnier 245 *
759 : monnier 411 * Some Ugliness: double precision floating point registers are
760 :     * register pairs. There are no double precision moves, negation and absolute
761 :     * values. These require two single precision operations. I've created
762 :     * composite instructions FMOVd, FNEGd and FABSd to stand for these.
763 : monnier 245 *
764 : monnier 411 * All integer arithmetic instructions can optionally set the condition
765 :     * code register. We use this to simplify certain comparisons with zero.
766 : monnier 245 *
767 : monnier 411 * Integer multiplication, division and conversion from integer to floating
768 :     * go thru the pseudo instruction interface, since older sparcs do not
769 :     * implement these instructions in hardware.
770 : monnier 245 *
771 : monnier 411 * In addition, the trap instruction for detecting overflow is a parameter.
772 :     * This allows different trap vectors to be used.
773 : monnier 245 *
774 : monnier 411 * -- Allen
775 :     *)

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