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(* x86comp-instr-ext.sml
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*
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* COPYRIGHT (c) 2000 Bell Labs, Lucent Technologies
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*
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* emit code for extensions to the x86 instruction set.
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*)
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signature X86COMP_INSTR_EXT = sig
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structure T : MLTREE
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structure I : X86INSTR
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type reducer =
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(I.instruction, I.C.regmap, I.C.cellset, I.operand, I.addressing_mode) T.reducer
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val compileSext :
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reducer
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-> {stm: (T.stm, T.rexp, T.fexp, T.ccexp) X86InstrExt.sext,
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an: T.an list}
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-> unit
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end
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functor X86CompInstrExt
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(structure T : MLTREE
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structure I : X86INSTR
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sharing T.LabelExp = I.LabelExp) : X86COMP_INSTR_EXT =
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struct
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structure T = T
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structure I = I
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structure C = I.C
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structure X = X86InstrExt
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type stm = (T.stm, T.rexp, T.fexp, T.ccexp) X.sext
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type reducer =
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(I.instruction, I.C.regmap, I.C.cellset, I.operand, I.addressing_mode) T.reducer
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val esp = C.esp
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val espOpnd = I.Direct(esp)
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fun error msg = MLRiscErrorMsg.error("X86CompInstrExt", msg)
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val stackArea = I.Region.stack
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fun compileSext reducer {stm: stm, an:T.an list} = let
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val T.REDUCER{operand, emit, reduceFexp, instrStream, ...} = reducer
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val T.Stream.STREAM{emit=emitI, ...} = instrStream
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fun fstp(sz, fstpInstr, fexp) =
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(case fexp
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of T.FREG(sz', f) =>
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if sz <> sz' then error "fstp: sz"
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else emitI(fstpInstr(I.FDirect f))
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| _ => error "fstp: fexp"
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(*esac*))
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in
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case stm
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of X.PUSHL(rexp) => emit(I.PUSHL(operand rexp), an)
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| X.POP(rexp) => emit(I.POP(operand rexp), an)
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| X.FSTPS(fexp) => fstp(32, I.FSTPS, fexp)
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| X.FSTPL(fexp) => fstp(64, I.FSTPL, fexp)
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| X.FSTPT(fexp) => fstp(80, I.FSTPT, fexp)
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| X.LEAVE => emit(I.LEAVE, an)
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| X.RET(rexp) => emit(I.RET(SOME(operand rexp)), an)
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end
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end
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