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[smlnj] Annotation of /sml/trunk/src/runtime/include/cache-flush.h
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Annotation of /sml/trunk/src/runtime/include/cache-flush.h

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1 : monnier 249 /* cache-flush.h
2 :     *
3 :     * COPYRIGHT (c) 1994 AT&T Bell Laboratories
4 :     *
5 :     * System dependent includes and macros for flushing the cache.
6 :     */
7 :    
8 :     #ifndef _CACHE_FLUSH_
9 :     #define _CACHE_FLUSH_
10 :    
11 :     #ifdef TARGET_MIPS
12 :     # ifdef OPSYS_MACH
13 :     # define INCLUDE_CACHECTL_H <mips/cachectl.h>
14 :     # else
15 :     # define INCLUDE_CACHECTL_H <sys/cachectl.h>
16 :     # endif
17 :     #endif
18 :    
19 :     #if defined(TARGET_MIPS)
20 :     # include INCLUDE_CACHECTL_H
21 :     # ifdef OPSYS_MACH
22 :     # include <sys/syscall.h>
23 :     # define MIPS_CACHEFLUSH 0x104
24 :     # define FlushICache(addr, size) \
25 :     (syscall(SYS_sysmips, MIPS_CACHEFLUSH, (addr), (size), BCACHE, 0))
26 :     # else
27 :     # define FlushICache(addr, size) \
28 :     (cacheflush((addr), (size), BCACHE))
29 :     # endif
30 :    
31 :     #elif defined(TARGET_X86)
32 :     /* 386 & 486 have unified caches and the pentium has hardware consistency */
33 :     # define FlushICache(addr, size)
34 :    
35 :     #elif ((defined(TARGET_RS6000) || defined(TARGET_PPC))&& defined(OPSYS_AIX))
36 :     # include <sys/cache.h>
37 :     # define FlushICache(addr, size) _sync_cache_range((addr), (size))
38 :    
39 :     #elif (defined(TARGET_SPARC) || defined(TARGET_ALPHA32) || defined(TARGET_HPPA) || defined(OPSYS_MKLINUX))
40 :     extern FlushICache (void *addr, int nbytes);
41 :    
42 : george 693 #elif (defined(TARGET_PPC) && defined(OPSYS_LINUX))
43 :     extern FlushICache (void *addr, int nbytes);
44 :    
45 : monnier 249 #else
46 :     # define FlushICache(addr, size)
47 :     #endif
48 :    
49 :     #endif /* !_CACHE_FLUSH_ */
50 :    

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